10l and better MMX/SSE detection for VIA1000
[libav.git] / libavcodec / i386 / cputest.c
CommitLineData
de6d9b64 1/* Cpu detection code, extracted from mmx.h ((c)1997-99 by H. Dietz
ff4ec49e 2 and R. Fisher). Converted to C and improved by Fabrice Bellard */
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3
4#include <stdlib.h>
5#include "../dsputil.h"
6
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7/* ebx saving is necessary for PIC. gcc seems unable to see it alone */
8#define cpuid(index,eax,ebx,ecx,edx)\
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9 __asm __volatile\
10 ("movl %%ebx, %%esi\n\t"\
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11 "cpuid\n\t"\
12 "xchgl %%ebx, %%esi"\
13 : "=a" (eax), "=S" (ebx),\
14 "=c" (ecx), "=d" (edx)\
c10e9f70 15 : "0" (index));
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16
17/* Function to test if multimedia instructions are supported... */
18int mm_support(void)
19{
20 int rval;
21 int eax, ebx, ecx, edx;
22
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23 __asm__ __volatile__ (
24 /* See if CPUID instruction is supported ... */
25 /* ... Get copies of EFLAGS into eax and ecx */
26 "pushf\n\t"
27 "popl %0\n\t"
28 "movl %0, %1\n\t"
29
30 /* ... Toggle the ID bit in one copy and store */
31 /* to the EFLAGS reg */
32 "xorl $0x200000, %0\n\t"
33 "push %0\n\t"
34 "popf\n\t"
35
36 /* ... Get the (hopefully modified) EFLAGS */
37 "pushf\n\t"
38 "popl %0\n\t"
39 : "=a" (eax), "=c" (ecx)
40 :
41 : "cc"
42 );
43
44 if (eax == ecx)
45 return 0; /* CPUID not supported */
46
1d20b11a 47 cpuid(0, eax, ebx, ecx, edx);
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48
49 if (ebx == 0x756e6547 &&
50 edx == 0x49656e69 &&
51 ecx == 0x6c65746e) {
52
53 /* intel */
54 inteltest:
1d20b11a 55 cpuid(1, eax, ebx, ecx, edx);
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56 if ((edx & 0x00800000) == 0)
57 return 0;
58 rval = MM_MMX;
59 if (edx & 0x02000000)
60 rval |= MM_MMXEXT | MM_SSE;
61 if (edx & 0x04000000)
62 rval |= MM_SSE2;
63 return rval;
64 } else if (ebx == 0x68747541 &&
65 edx == 0x69746e65 &&
66 ecx == 0x444d4163) {
67 /* AMD */
1d20b11a 68 cpuid(0x80000000, eax, ebx, ecx, edx);
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69 if ((unsigned)eax < 0x80000001)
70 goto inteltest;
1d20b11a 71 cpuid(0x80000001, eax, ebx, ecx, edx);
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72 if ((edx & 0x00800000) == 0)
73 return 0;
74 rval = MM_MMX;
75 if (edx & 0x80000000)
76 rval |= MM_3DNOW;
77 if (edx & 0x00400000)
78 rval |= MM_MMXEXT;
79 return rval;
57fc2576
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80 } else if (ebx == 0x746e6543 &&
81 edx == 0x48727561 &&
82 ecx == 0x736c7561) { /* "CentaurHauls" */
83 /* VIA C3 */
84 cpuid(0x80000000, eax, ebx, ecx, edx);
85 if ((unsigned)eax < 0x80000001)
86 goto inteltest;
87 cpuid(0x80000001, eax, ebx, ecx, edx);
88 rval = 0;
89 if( edx & ( 1 << 31) )
90 rval |= MM_3DNOW;
91 if( edx & ( 1 << 23) )
92 rval |= MM_MMX;
93 if( edx & ( 1 << 24) )
7ca413b4 94 rval |= MM_MMXEXT;
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95 if(rval==0)
96 goto inteltest;
7ca413b4 97 return rval;
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98 } else if (ebx == 0x69727943 &&
99 edx == 0x736e4978 &&
100 ecx == 0x64616574) {
101 /* Cyrix Section */
102 /* See if extended CPUID level 80000001 is supported */
103 /* The value of CPUID/80000001 for the 6x86MX is undefined
104 according to the Cyrix CPU Detection Guide (Preliminary
105 Rev. 1.01 table 1), so we'll check the value of eax for
106 CPUID/0 to see if standard CPUID level 2 is supported.
107 According to the table, the only CPU which supports level
108 2 is also the only one which supports extended CPUID levels.
109 */
110 if (eax != 2)
111 goto inteltest;
1d20b11a 112 cpuid(0x80000001, eax, ebx, ecx, edx);
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113 if ((eax & 0x00800000) == 0)
114 return 0;
115 rval = MM_MMX;
116 if (eax & 0x01000000)
117 rval |= MM_MMXEXT;
118 return rval;
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119 } else if (ebx == 0x756e6547 &&
120 edx == 0x54656e69 &&
121 ecx == 0x3638784d) {
122 /* Tranmeta Crusoe */
123 cpuid(0x80000000, eax, ebx, ecx, edx);
124 if ((unsigned)eax < 0x80000001)
125 return 0;
126 cpuid(0x80000001, eax, ebx, ecx, edx);
127 if ((edx & 0x00800000) == 0)
128 return 0;
129 return MM_MMX;
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130 } else {
131 return 0;
132 }
133}
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134
135#ifdef __TEST__
136int main ( void )
137{
138 int mm_flags;
139 mm_flags = mm_support();
6206f8c9 140 printf("mm_support = 0x%08X\n",mm_flags);
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141 return 0;
142}
143#endif