x86: add detection for Bit Manipulation Instruction sets
[libav.git] / libavutil / cpu.h
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1/*
2 * Copyright (c) 2000, 2001, 2002 Fabrice Bellard
3 *
2912e87a 4 * This file is part of Libav.
7160bb71 5 *
2912e87a 6 * Libav is free software; you can redistribute it and/or
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7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
10 *
2912e87a 11 * Libav is distributed in the hope that it will be useful,
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12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
2912e87a 17 * License along with Libav; if not, write to the Free Software
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18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#ifndef AVUTIL_CPU_H
22#define AVUTIL_CPU_H
23
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24#include "version.h"
25
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26#define AV_CPU_FLAG_FORCE 0x80000000 /* force usage of selected flags (OR) */
27
28 /* lower 16 bits - CPU features */
29#define AV_CPU_FLAG_MMX 0x0001 ///< standard MMX
239fdf1b 30#define AV_CPU_FLAG_MMXEXT 0x0002 ///< SSE integer functions or AMD MMX ext
8f5587c3 31#if FF_API_CPU_FLAG_MMX2
7160bb71 32#define AV_CPU_FLAG_MMX2 0x0002 ///< SSE integer functions or AMD MMX ext
239fdf1b 33#endif
e778e50f 34#define AV_CPU_FLAG_3DNOW 0x0004 ///< AMD 3DNOW
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35#define AV_CPU_FLAG_SSE 0x0008 ///< SSE functions
36#define AV_CPU_FLAG_SSE2 0x0010 ///< PIV SSE2 functions
37#define AV_CPU_FLAG_SSE2SLOW 0x40000000 ///< SSE2 supported, but usually not faster
80fefbed 38 ///< than regular MMX/SSE (e.g. Core1)
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39#define AV_CPU_FLAG_3DNOWEXT 0x0020 ///< AMD 3DNowExt
40#define AV_CPU_FLAG_SSE3 0x0040 ///< Prescott SSE3 functions
d593b4ed 41#define AV_CPU_FLAG_SSE3SLOW 0x20000000 ///< SSE3 supported, but usually not faster
80fefbed 42 ///< than regular MMX/SSE (e.g. Core1)
7160bb71 43#define AV_CPU_FLAG_SSSE3 0x0080 ///< Conroe SSSE3 functions
eba586b0 44#define AV_CPU_FLAG_ATOM 0x10000000 ///< Atom processor, some SSSE3 instructions are slower
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45#define AV_CPU_FLAG_SSE4 0x0100 ///< Penryn SSE4.1 functions
46#define AV_CPU_FLAG_SSE42 0x0200 ///< Nehalem SSE4.2 functions
87f1355f 47#define AV_CPU_FLAG_AVX 0x4000 ///< AVX functions: requires OS support even if YMM registers aren't used
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48#define AV_CPU_FLAG_XOP 0x0400 ///< Bulldozer XOP functions
49#define AV_CPU_FLAG_FMA4 0x0800 ///< Bulldozer FMA4 functions
65345a5a 50#define AV_CPU_FLAG_CMOV 0x1000 ///< i686 cmov
4d6ee072 51#define AV_CPU_FLAG_AVX2 0x8000 ///< AVX2 functions: requires OS support even if YMM registers aren't used
1b932eb1 52#define AV_CPU_FLAG_FMA3 0x10000 ///< Haswell FMA3 functions
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53#define AV_CPU_FLAG_BMI1 0x20000 ///< Bit Manipulation Instruction Set 1
54#define AV_CPU_FLAG_BMI2 0x40000 ///< Bit Manipulation Instruction Set 2
65345a5a 55
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56#define AV_CPU_FLAG_ALTIVEC 0x0001 ///< standard
57
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58#define AV_CPU_FLAG_ARMV5TE (1 << 0)
59#define AV_CPU_FLAG_ARMV6 (1 << 1)
60#define AV_CPU_FLAG_ARMV6T2 (1 << 2)
61#define AV_CPU_FLAG_VFP (1 << 3)
62#define AV_CPU_FLAG_VFPV3 (1 << 4)
63#define AV_CPU_FLAG_NEON (1 << 5)
64
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65/**
66 * Return the flags which specify extensions supported by the CPU.
67 */
68int av_get_cpu_flags(void);
69
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70/**
71 * Set a mask on flags returned by av_get_cpu_flags().
72 * This function is mainly useful for testing.
73 *
74 * @warning this function is not thread safe.
75 */
76void av_set_cpu_flags_mask(int mask);
77
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78/**
79 * Parse CPU flags from a string.
80 *
81 * @return a combination of AV_CPU_* flags, negative on error.
82 */
83int av_parse_cpu_flags(const char *s);
84
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85/**
86 * @return the number of logical CPU cores present.
87 */
88int av_cpu_count(void);
89
153382e1 90#endif /* AVUTIL_CPU_H */