x86: fdct: Employ more specific ifdefs
[libav.git] / libavutil / x86 / x86inc.asm
CommitLineData
bafad220 1;*****************************************************************************
2f7f2e4b 2;* x86inc.asm: x264asm abstraction layer
bafad220 3;*****************************************************************************
729f90e2 4;* Copyright (C) 2005-2012 x264 project
bafad220 5;*
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6;* Authors: Loren Merritt <lorenm@u.washington.edu>
7;* Anton Mitrofanov <BugMaster@narod.ru>
33cbfa6f 8;* Jason Garrett-Glaser <darkshikari@gmail.com>
729f90e2 9;* Henrik Gramner <hengar-6@student.ltu.se>
bafad220 10;*
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11;* Permission to use, copy, modify, and/or distribute this software for any
12;* purpose with or without fee is hereby granted, provided that the above
13;* copyright notice and this permission notice appear in all copies.
bafad220 14;*
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15;* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
16;* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
17;* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
18;* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
19;* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
20;* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
21;* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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22;*****************************************************************************
23
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24; This is a header file for the x264ASM assembly language, which uses
25; NASM/YASM syntax combined with a large number of macros to provide easy
26; abstraction between different calling conventions (x86_32, win64, linux64).
27; It also has various other useful features to simplify writing the kind of
28; DSP functions that are most often used in x264.
29
30; Unlike the rest of x264, this file is available under an ISC license, as it
31; has significant usefulness outside of x264 and we want it to be available
32; to the largest audience possible. Of course, if you modify it for your own
33; purposes to add a new feature, we strongly encourage contributing a patch
34; as this feature might be useful for others as well. Send patches or ideas
35; to x264-devel@videolan.org .
36
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37%ifndef private_prefix
38 %define private_prefix x264
012f73e2 39%endif
2966cc18 40
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41%ifndef public_prefix
42 %define public_prefix private_prefix
43%endif
44
3b15a6d7 45%define WIN64 0
96c9cc10 46%define UNIX64 0
3b15a6d7 47%if ARCH_X86_64
3f87f39c 48 %ifidn __OUTPUT_FORMAT__,win32
3b15a6d7 49 %define WIN64 1
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50 %elifidn __OUTPUT_FORMAT__,win64
51 %define WIN64 1
3f87f39c 52 %else
3b15a6d7 53 %define UNIX64 1
3f87f39c
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54 %endif
55%endif
56
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57%ifdef PREFIX
58 %define mangle(x) _ %+ x
59%else
60 %define mangle(x) x
61%endif
62
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63; Name of the .rodata section.
64; Kludge: Something on OS X fails to align .rodata even given an align attribute,
65; so use a different read-only section.
3f87f39c 66%macro SECTION_RODATA 0-1 16
bafad220 67 %ifidn __OUTPUT_FORMAT__,macho64
3f87f39c 68 SECTION .text align=%1
bafad220 69 %elifidn __OUTPUT_FORMAT__,macho
3f87f39c 70 SECTION .text align=%1
bafad220 71 fakegot:
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72 %elifidn __OUTPUT_FORMAT__,aout
73 section .text
bafad220 74 %else
3f87f39c 75 SECTION .rodata align=%1
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76 %endif
77%endmacro
78
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79; aout does not support align=
80%macro SECTION_TEXT 0-1 16
81 %ifidn __OUTPUT_FORMAT__,aout
82 SECTION .text
83 %else
84 SECTION .text align=%1
85 %endif
86%endmacro
87
3b15a6d7 88%if WIN64
3f87f39c 89 %define PIC
412b248e 90%elif ARCH_X86_64 == 0
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91; x86_32 doesn't require PIC.
92; Some distros prefer shared objects to be PIC, but nothing breaks if
93; the code contains a few textrels, so we'll skip that complexity.
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94 %undef PIC
95%endif
96%ifdef PIC
2966cc18 97 default rel
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98%endif
99
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100%macro CPUNOP 1
101 %if HAVE_CPUNOP
102 CPU %1
103 %endif
104%endmacro
105
729f90e2 106; Always use long nops (reduces 0x90 spam in disassembly on x86_32)
180d43bc 107CPUNOP amdnop
729f90e2 108
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109; Macros to eliminate most code duplication between x86_32 and x86_64:
110; Currently this works only for leaf functions which load all their arguments
111; into registers at the start, and make no other use of the stack. Luckily that
112; covers most of x264's asm.
113
114; PROLOGUE:
115; %1 = number of arguments. loads them from stack if needed.
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116; %2 = number of registers used. pushes callee-saved regs if needed.
117; %3 = number of xmm registers used. pushes callee-saved xmm regs if needed.
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118; %4 = (optional) stack size to be allocated. If not aligned (x86-32 ICC 10.x,
119; MSVC or YMM), the stack will be manually aligned (to 16 or 32 bytes),
120; and an extra register will be allocated to hold the original stack
121; pointer (to not invalidate r0m etc.). To prevent the use of an extra
122; register as stack pointer, request a negative stack size.
123; %4+/%5+ = list of names to define to registers
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124; PROLOGUE can also be invoked by adding the same options to cglobal
125
126; e.g.
29e4edbb 127; cglobal foo, 2,3,0, dst, src, tmp
3f87f39c 128; declares a function (foo), taking two args (dst and src) and one local variable (tmp)
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129
130; TODO Some functions can use some args directly from the stack. If they're the
131; last args then you can just not declare them, but if they're in the middle
132; we need more flexible macro.
133
134; RET:
2f7f2e4b 135; Pops anything that was pushed by PROLOGUE, and returns.
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136
137; REP_RET:
138; Same, but if it doesn't pop anything it becomes a 2-byte ret, for athlons
139; which are slow when a normal ret follows a branch.
140
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141; registers:
142; rN and rNq are the native-size register holding function argument N
143; rNd, rNw, rNb are dword, word, and byte size
96c9cc10 144; rNh is the high 8 bits of the word size
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145; rNm is the original location of arg N (a register or on the stack), dword
146; rNmp is native size
147
96c9cc10 148%macro DECLARE_REG 2-3
bafad220 149 %define r%1q %2
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150 %define r%1d %2d
151 %define r%1w %2w
152 %define r%1b %2b
153 %define r%1h %2h
7a1944b9 154 %define %2q %2
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155 %if %0 == 2
156 %define r%1m %2d
3f87f39c 157 %define r%1mp %2
3b15a6d7 158 %elif ARCH_X86_64 ; memory
6f40e9f0 159 %define r%1m [rstk + stack_offset + %3]
0995ad8d 160 %define r%1mp qword r %+ %1 %+ m
3f87f39c 161 %else
6f40e9f0 162 %define r%1m [rstk + stack_offset + %3]
0995ad8d 163 %define r%1mp dword r %+ %1 %+ m
3f87f39c 164 %endif
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165 %define r%1 %2
166%endmacro
167
96c9cc10 168%macro DECLARE_REG_SIZE 3
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169 %define r%1q r%1
170 %define e%1q r%1
171 %define r%1d e%1
172 %define e%1d e%1
173 %define r%1w %1
174 %define e%1w %1
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175 %define r%1h %3
176 %define e%1h %3
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177 %define r%1b %2
178 %define e%1b %2
3b15a6d7 179%if ARCH_X86_64 == 0
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180 %define r%1 e%1
181%endif
182%endmacro
183
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184DECLARE_REG_SIZE ax, al, ah
185DECLARE_REG_SIZE bx, bl, bh
186DECLARE_REG_SIZE cx, cl, ch
187DECLARE_REG_SIZE dx, dl, dh
188DECLARE_REG_SIZE si, sil, null
189DECLARE_REG_SIZE di, dil, null
190DECLARE_REG_SIZE bp, bpl, null
bafad220 191
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192; t# defines for when per-arch register allocation is more complex than just function arguments
193
194%macro DECLARE_REG_TMP 1-*
195 %assign %%i 0
196 %rep %0
197 CAT_XDEFINE t, %%i, r%1
198 %assign %%i %%i+1
199 %rotate 1
200 %endrep
201%endmacro
202
203%macro DECLARE_REG_TMP_SIZE 0-*
204 %rep %0
205 %define t%1q t%1 %+ q
206 %define t%1d t%1 %+ d
207 %define t%1w t%1 %+ w
96c9cc10 208 %define t%1h t%1 %+ h
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209 %define t%1b t%1 %+ b
210 %rotate 1
211 %endrep
212%endmacro
213
729f90e2 214DECLARE_REG_TMP_SIZE 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14
3f87f39c 215
3b15a6d7 216%if ARCH_X86_64
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217 %define gprsize 8
218%else
219 %define gprsize 4
220%endif
221
222%macro PUSH 1
223 push %1
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224 %ifidn rstk, rsp
225 %assign stack_offset stack_offset+gprsize
226 %endif
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227%endmacro
228
229%macro POP 1
230 pop %1
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231 %ifidn rstk, rsp
232 %assign stack_offset stack_offset-gprsize
233 %endif
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234%endmacro
235
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236%macro PUSH_IF_USED 1-*
237 %rep %0
238 %if %1 < regs_used
239 PUSH r%1
240 %endif
241 %rotate 1
242 %endrep
243%endmacro
244
245%macro POP_IF_USED 1-*
246 %rep %0
247 %if %1 < regs_used
248 pop r%1
249 %endif
250 %rotate 1
251 %endrep
252%endmacro
253
254%macro LOAD_IF_USED 1-*
255 %rep %0
256 %if %1 < num_args
257 mov r%1, r %+ %1 %+ mp
258 %endif
259 %rotate 1
260 %endrep
261%endmacro
262
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263%macro SUB 2
264 sub %1, %2
6f40e9f0 265 %ifidn %1, rstk
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266 %assign stack_offset stack_offset+(%2)
267 %endif
268%endmacro
269
270%macro ADD 2
271 add %1, %2
6f40e9f0 272 %ifidn %1, rstk
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273 %assign stack_offset stack_offset-(%2)
274 %endif
275%endmacro
276
277%macro movifnidn 2
278 %ifnidn %1, %2
279 mov %1, %2
280 %endif
281%endmacro
282
283%macro movsxdifnidn 2
284 %ifnidn %1, %2
285 movsxd %1, %2
286 %endif
287%endmacro
288
289%macro ASSERT 1
290 %if (%1) == 0
291 %error assert failed
292 %endif
293%endmacro
294
295%macro DEFINE_ARGS 0-*
296 %ifdef n_arg_names
297 %assign %%i 0
298 %rep n_arg_names
299 CAT_UNDEF arg_name %+ %%i, q
300 CAT_UNDEF arg_name %+ %%i, d
301 CAT_UNDEF arg_name %+ %%i, w
96c9cc10 302 CAT_UNDEF arg_name %+ %%i, h
bafad220 303 CAT_UNDEF arg_name %+ %%i, b
2f77923d 304 CAT_UNDEF arg_name %+ %%i, m
98b9da2a 305 CAT_UNDEF arg_name %+ %%i, mp
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306 CAT_UNDEF arg_name, %%i
307 %assign %%i %%i+1
308 %endrep
309 %endif
310
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311 %xdefine %%stack_offset stack_offset
312 %undef stack_offset ; so that the current value of stack_offset doesn't get baked in by xdefine
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313 %assign %%i 0
314 %rep %0
315 %xdefine %1q r %+ %%i %+ q
316 %xdefine %1d r %+ %%i %+ d
317 %xdefine %1w r %+ %%i %+ w
96c9cc10 318 %xdefine %1h r %+ %%i %+ h
bafad220 319 %xdefine %1b r %+ %%i %+ b
2f77923d 320 %xdefine %1m r %+ %%i %+ m
98b9da2a 321 %xdefine %1mp r %+ %%i %+ mp
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322 CAT_XDEFINE arg_name, %%i, %1
323 %assign %%i %%i+1
324 %rotate 1
325 %endrep
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326 %xdefine stack_offset %%stack_offset
327 %assign n_arg_names %0
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328%endmacro
329
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330%macro ALLOC_STACK 1-2 0 ; stack_size, n_xmm_regs (for win64 only)
331 %ifnum %1
332 %if %1 != 0
333 %assign %%stack_alignment ((mmsize + 15) & ~15)
334 %assign stack_size %1
335 %if stack_size < 0
336 %assign stack_size -stack_size
337 %endif
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338 %if mmsize != 8
339 %assign xmm_regs_used %2
340 %endif
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341 %if mmsize <= 16 && HAVE_ALIGNED_STACK
342 %assign stack_size_padded stack_size + %%stack_alignment - gprsize - (stack_offset & (%%stack_alignment - 1))
343 %if xmm_regs_used > 6
344 %assign stack_size_padded stack_size_padded + (xmm_regs_used - 6) * 16
345 %endif
346 SUB rsp, stack_size_padded
347 %else
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348 %assign %%reg_num (regs_used - 1)
349 %xdefine rstk r %+ %%reg_num
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350 ; align stack, and save original stack location directly above
351 ; it, i.e. in [rsp+stack_size_padded], so we can restore the
352 ; stack in a single instruction (i.e. mov rsp, rstk or mov
353 ; rsp, [rsp+stack_size_padded])
354 mov rstk, rsp
355 %assign stack_size_padded stack_size
356 %if xmm_regs_used > 6
357 %assign stack_size_padded stack_size_padded + (xmm_regs_used - 6) * 16
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358 %if mmsize == 32 && xmm_regs_used & 1
359 ; re-align to 32 bytes
360 %assign stack_size_padded (stack_size_padded + 16)
361 %endif
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362 %endif
363 %if %1 < 0 ; need to store rsp on stack
364 sub rsp, gprsize+stack_size_padded
365 and rsp, ~(%%stack_alignment-1)
366 %xdefine rstkm [rsp+stack_size_padded]
367 mov rstkm, rstk
368 %else ; can keep rsp in rstk during whole function
369 sub rsp, stack_size_padded
370 and rsp, ~(%%stack_alignment-1)
371 %xdefine rstkm rstk
372 %endif
373 %endif
374 %if xmm_regs_used > 6
375 WIN64_PUSH_XMM
376 %endif
377 %endif
378 %endif
379%endmacro
380
381%macro SETUP_STACK_POINTER 1
382 %ifnum %1
383 %if %1 != 0 && (HAVE_ALIGNED_STACK == 0 || mmsize == 32)
384 %if %1 > 0
385 %assign regs_used (regs_used + 1)
386 %elif ARCH_X86_64 && regs_used == num_args && num_args <= 4 + UNIX64 * 2
387 %warning "Stack pointer will overwrite register argument"
388 %endif
389 %endif
390 %endif
391%endmacro
392
393%macro DEFINE_ARGS_INTERNAL 3+
394 %ifnum %2
395 DEFINE_ARGS %3
396 %elif %1 == 4
397 DEFINE_ARGS %2
398 %elif %1 > 4
399 DEFINE_ARGS %2, %3
400 %endif
401%endmacro
402
3b15a6d7 403%if WIN64 ; Windows x64 ;=================================================
bafad220 404
96c9cc10
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405DECLARE_REG 0, rcx
406DECLARE_REG 1, rdx
407DECLARE_REG 2, R8
408DECLARE_REG 3, R9
409DECLARE_REG 4, R10, 40
410DECLARE_REG 5, R11, 48
411DECLARE_REG 6, rax, 56
412DECLARE_REG 7, rdi, 64
413DECLARE_REG 8, rsi, 72
414DECLARE_REG 9, rbx, 80
415DECLARE_REG 10, rbp, 88
416DECLARE_REG 11, R12, 96
417DECLARE_REG 12, R13, 104
418DECLARE_REG 13, R14, 112
419DECLARE_REG 14, R15, 120
3f87f39c 420
6f40e9f0 421%macro PROLOGUE 2-5+ 0 ; #args, #regs, #xmm_regs, [stack_size,] arg_names...
729f90e2 422 %assign num_args %1
3f87f39c 423 %assign regs_used %2
729f90e2 424 ASSERT regs_used >= num_args
a34d9ad9 425 SETUP_STACK_POINTER %4
729f90e2
HG
426 ASSERT regs_used <= 15
427 PUSH_IF_USED 7, 8, 9, 10, 11, 12, 13, 14
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428 ALLOC_STACK %4, %3
429 %if mmsize != 8 && stack_size == 0
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HG
430 WIN64_SPILL_XMM %3
431 %endif
729f90e2 432 LOAD_IF_USED 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
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433 DEFINE_ARGS_INTERNAL %0, %4, %5
434%endmacro
435
436%macro WIN64_PUSH_XMM 0
437 %assign %%i xmm_regs_used
438 %rep (xmm_regs_used-6)
439 %assign %%i %%i-1
140367af 440 movdqa [rsp + (%%i-6)*16 + stack_size + (~stack_offset&8)], xmm %+ %%i
6f40e9f0 441 %endrep
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442%endmacro
443
444%macro WIN64_SPILL_XMM 1
445 %assign xmm_regs_used %1
446 ASSERT xmm_regs_used <= 16
3f87f39c 447 %if xmm_regs_used > 6
140367af 448 SUB rsp, (xmm_regs_used-6)*16+16
6f40e9f0 449 WIN64_PUSH_XMM
3f87f39c 450 %endif
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451%endmacro
452
532e7697 453%macro WIN64_RESTORE_XMM_INTERNAL 1
3f87f39c
JA
454 %if xmm_regs_used > 6
455 %assign %%i xmm_regs_used
456 %rep (xmm_regs_used-6)
457 %assign %%i %%i-1
140367af 458 movdqa xmm %+ %%i, [%1 + (%%i-6)*16+stack_size+(~stack_offset&8)]
3f87f39c 459 %endrep
140367af
RB
460 %if stack_size_padded == 0
461 add %1, (xmm_regs_used-6)*16+16
462 %endif
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463 %endif
464 %if stack_size_padded > 0
465 %if stack_size > 0 && (mmsize == 32 || HAVE_ALIGNED_STACK == 0)
466 mov rsp, rstkm
467 %else
468 add %1, stack_size_padded
469 %endif
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470 %endif
471%endmacro
472
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473%macro WIN64_RESTORE_XMM 1
474 WIN64_RESTORE_XMM_INTERNAL %1
6f40e9f0 475 %assign stack_offset (stack_offset-stack_size_padded)
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476 %assign xmm_regs_used 0
477%endmacro
478
6f40e9f0 479%define has_epilogue regs_used > 7 || xmm_regs_used > 6 || mmsize == 32 || stack_size > 0
96c9cc10 480
3f87f39c 481%macro RET 0
532e7697 482 WIN64_RESTORE_XMM_INTERNAL rsp
729f90e2 483 POP_IF_USED 14, 13, 12, 11, 10, 9, 8, 7
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484%if mmsize == 32
485 vzeroupper
486%endif
3f87f39c 487 ret
bafad220
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488%endmacro
489
3b15a6d7 490%elif ARCH_X86_64 ; *nix x64 ;=============================================
bafad220 491
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492DECLARE_REG 0, rdi
493DECLARE_REG 1, rsi
494DECLARE_REG 2, rdx
495DECLARE_REG 3, rcx
496DECLARE_REG 4, R8
497DECLARE_REG 5, R9
498DECLARE_REG 6, rax, 8
499DECLARE_REG 7, R10, 16
500DECLARE_REG 8, R11, 24
501DECLARE_REG 9, rbx, 32
502DECLARE_REG 10, rbp, 40
503DECLARE_REG 11, R12, 48
504DECLARE_REG 12, R13, 56
505DECLARE_REG 13, R14, 64
506DECLARE_REG 14, R15, 72
bafad220 507
6f40e9f0 508%macro PROLOGUE 2-5+ ; #args, #regs, #xmm_regs, [stack_size,] arg_names...
729f90e2
HG
509 %assign num_args %1
510 %assign regs_used %2
511 ASSERT regs_used >= num_args
a34d9ad9 512 SETUP_STACK_POINTER %4
729f90e2
HG
513 ASSERT regs_used <= 15
514 PUSH_IF_USED 9, 10, 11, 12, 13, 14
6f40e9f0 515 ALLOC_STACK %4
729f90e2 516 LOAD_IF_USED 6, 7, 8, 9, 10, 11, 12, 13, 14
6f40e9f0 517 DEFINE_ARGS_INTERNAL %0, %4, %5
bafad220
LM
518%endmacro
519
6f40e9f0 520%define has_epilogue regs_used > 9 || mmsize == 32 || stack_size > 0
96c9cc10 521
bafad220 522%macro RET 0
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RB
523%if stack_size_padded > 0
524%if mmsize == 32 || HAVE_ALIGNED_STACK == 0
525 mov rsp, rstkm
526%else
527 add rsp, stack_size_padded
528%endif
529%endif
729f90e2 530 POP_IF_USED 14, 13, 12, 11, 10, 9
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RB
531%if mmsize == 32
532 vzeroupper
533%endif
bafad220
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534 ret
535%endmacro
536
bafad220
LM
537%else ; X86_32 ;==============================================================
538
96c9cc10
RB
539DECLARE_REG 0, eax, 4
540DECLARE_REG 1, ecx, 8
541DECLARE_REG 2, edx, 12
542DECLARE_REG 3, ebx, 16
543DECLARE_REG 4, esi, 20
544DECLARE_REG 5, edi, 24
545DECLARE_REG 6, ebp, 28
bafad220
LM
546%define rsp esp
547
729f90e2
HG
548%macro DECLARE_ARG 1-*
549 %rep %0
6f40e9f0 550 %define r%1m [rstk + stack_offset + 4*%1 + 4]
729f90e2
HG
551 %define r%1mp dword r%1m
552 %rotate 1
553 %endrep
bafad220
LM
554%endmacro
555
729f90e2 556DECLARE_ARG 7, 8, 9, 10, 11, 12, 13, 14
bafad220 557
6f40e9f0 558%macro PROLOGUE 2-5+ ; #args, #regs, #xmm_regs, [stack_size,] arg_names...
729f90e2 559 %assign num_args %1
bafad220 560 %assign regs_used %2
a34d9ad9
RB
561 ASSERT regs_used >= num_args
562 %if num_args > 7
563 %assign num_args 7
564 %endif
729f90e2
HG
565 %if regs_used > 7
566 %assign regs_used 7
567 %endif
6f40e9f0
RB
568 SETUP_STACK_POINTER %4
569 ASSERT regs_used <= 7
729f90e2 570 PUSH_IF_USED 3, 4, 5, 6
6f40e9f0 571 ALLOC_STACK %4
729f90e2 572 LOAD_IF_USED 0, 1, 2, 3, 4, 5, 6
6f40e9f0 573 DEFINE_ARGS_INTERNAL %0, %4, %5
bafad220
LM
574%endmacro
575
6f40e9f0 576%define has_epilogue regs_used > 3 || mmsize == 32 || stack_size > 0
96c9cc10 577
bafad220 578%macro RET 0
6f40e9f0
RB
579%if stack_size_padded > 0
580%if mmsize == 32 || HAVE_ALIGNED_STACK == 0
581 mov rsp, rstkm
582%else
583 add rsp, stack_size_padded
584%endif
585%endif
729f90e2 586 POP_IF_USED 6, 5, 4, 3
30b45d9c
RB
587%if mmsize == 32
588 vzeroupper
589%endif
bafad220
LM
590 ret
591%endmacro
592
bafad220
LM
593%endif ;======================================================================
594
3b15a6d7 595%if WIN64 == 0
532e7697
LM
596%macro WIN64_SPILL_XMM 1
597%endmacro
598%macro WIN64_RESTORE_XMM 1
599%endmacro
6f40e9f0
RB
600%macro WIN64_PUSH_XMM 0
601%endmacro
532e7697
LM
602%endif
603
96c9cc10
RB
604%macro REP_RET 0
605 %if has_epilogue
606 RET
607 %else
608 rep ret
609 %endif
610%endmacro
611
612%macro TAIL_CALL 2 ; callee, is_nonadjacent
613 %if has_epilogue
614 call %1
615 RET
616 %elif %2
617 jmp %1
618 %endif
619%endmacro
620
bafad220
LM
621;=============================================================================
622; arch-independent part
623;=============================================================================
624
625%assign function_align 16
626
2f7f2e4b
LM
627; Begin a function.
628; Applies any symbol mangling needed for C linkage, and sets up a define such that
629; subsequent uses of the function name automatically refer to the mangled version.
630; Appends cpuflags to the function name if cpuflags has been specified.
d633d12b
DB
631; The "" empty default parameter is a workaround for nasm, which fails if SUFFIX
632; is empty and we call cglobal_internal with just %1 %+ SUFFIX (without %2).
a34d9ad9 633%macro cglobal 1-2+ "" ; name, [PROLOGUE args]
d633d12b
DB
634 cglobal_internal 1, %1 %+ SUFFIX, %2
635%endmacro
636%macro cvisible 1-2+ "" ; name, [PROLOGUE args]
637 cglobal_internal 0, %1 %+ SUFFIX, %2
638%endmacro
639%macro cglobal_internal 2-3+
640 %if %1
641 %xdefine %%FUNCTION_PREFIX private_prefix
642 %xdefine %%VISIBILITY hidden
643 %else
644 %xdefine %%FUNCTION_PREFIX public_prefix
645 %xdefine %%VISIBILITY
646 %endif
647 %ifndef cglobaled_%2
648 %xdefine %2 mangle(%%FUNCTION_PREFIX %+ _ %+ %2)
649 %xdefine %2.skip_prologue %2 %+ .skip_prologue
650 CAT_XDEFINE cglobaled_, %2, 1
2f7f2e4b 651 %endif
d633d12b 652 %xdefine current_function %2
bafad220 653 %ifidn __OUTPUT_FORMAT__,elf
d633d12b 654 global %2:function %%VISIBILITY
bafad220 655 %else
d633d12b 656 global %2
bafad220
LM
657 %endif
658 align function_align
d633d12b 659 %2:
bafad220 660 RESET_MM_PERMUTATION ; not really needed, but makes disassembly somewhat nicer
6f40e9f0 661 %xdefine rstk rsp
3f87f39c 662 %assign stack_offset 0
6f40e9f0
RB
663 %assign stack_size 0
664 %assign stack_size_padded 0
a34d9ad9 665 %assign xmm_regs_used 0
d633d12b
DB
666 %ifnidn %3, ""
667 PROLOGUE %3
bafad220
LM
668 %endif
669%endmacro
670
671%macro cextern 1
ef5d41a5 672 %xdefine %1 mangle(private_prefix %+ _ %+ %1)
2f7f2e4b 673 CAT_XDEFINE cglobaled_, %1, 1
2966cc18
JGG
674 extern %1
675%endmacro
676
2f7f2e4b 677; like cextern, but without the prefix
2966cc18
JGG
678%macro cextern_naked 1
679 %xdefine %1 mangle(%1)
2f7f2e4b 680 CAT_XDEFINE cglobaled_, %1, 1
3f87f39c 681 extern %1
bafad220
LM
682%endmacro
683
2966cc18 684%macro const 2+
ef5d41a5 685 %xdefine %1 mangle(private_prefix %+ _ %+ %1)
2966cc18
JGG
686 global %1
687 %1: %2
688%endmacro
689
bafad220
LM
690; This is needed for ELF, otherwise the GNU linker assumes the stack is
691; executable by default.
692%ifidn __OUTPUT_FORMAT__,elf
693SECTION .note.GNU-stack noalloc noexec nowrite progbits
694%endif
695
2f7f2e4b
LM
696; cpuflags
697
698%assign cpuflags_mmx (1<<0)
699%assign cpuflags_mmx2 (1<<1) | cpuflags_mmx
700%assign cpuflags_3dnow (1<<2) | cpuflags_mmx
ca844b7b 701%assign cpuflags_3dnowext (1<<3) | cpuflags_3dnow
2f7f2e4b
LM
702%assign cpuflags_sse (1<<4) | cpuflags_mmx2
703%assign cpuflags_sse2 (1<<5) | cpuflags_sse
704%assign cpuflags_sse2slow (1<<6) | cpuflags_sse2
705%assign cpuflags_sse3 (1<<7) | cpuflags_sse2
706%assign cpuflags_ssse3 (1<<8) | cpuflags_sse3
707%assign cpuflags_sse4 (1<<9) | cpuflags_ssse3
708%assign cpuflags_sse42 (1<<10)| cpuflags_sse4
709%assign cpuflags_avx (1<<11)| cpuflags_sse42
710%assign cpuflags_xop (1<<12)| cpuflags_avx
711%assign cpuflags_fma4 (1<<13)| cpuflags_avx
96c9cc10
RB
712%assign cpuflags_avx2 (1<<14)| cpuflags_avx
713%assign cpuflags_fma3 (1<<15)| cpuflags_avx
2f7f2e4b
LM
714
715%assign cpuflags_cache32 (1<<16)
716%assign cpuflags_cache64 (1<<17)
717%assign cpuflags_slowctz (1<<18)
718%assign cpuflags_lzcnt (1<<19)
719%assign cpuflags_misalign (1<<20)
720%assign cpuflags_aligned (1<<21) ; not a cpu feature, but a function variant
721%assign cpuflags_atom (1<<22)
96c9cc10
RB
722%assign cpuflags_bmi1 (1<<23)
723%assign cpuflags_bmi2 (1<<24)|cpuflags_bmi1
724%assign cpuflags_tbm (1<<25)|cpuflags_bmi1
2f7f2e4b
LM
725
726%define cpuflag(x) ((cpuflags & (cpuflags_ %+ x)) == (cpuflags_ %+ x))
727%define notcpuflag(x) ((cpuflags & (cpuflags_ %+ x)) != (cpuflags_ %+ x))
728
729; Takes up to 2 cpuflags from the above list.
730; All subsequent functions (up to the next INIT_CPUFLAGS) is built for the specified cpu.
731; You shouldn't need to invoke this macro directly, it's a subroutine for INIT_MMX &co.
732%macro INIT_CPUFLAGS 0-2
180d43bc 733 CPUNOP amdnop
2f7f2e4b
LM
734 %if %0 >= 1
735 %xdefine cpuname %1
736 %assign cpuflags cpuflags_%1
737 %if %0 >= 2
738 %xdefine cpuname %1_%2
739 %assign cpuflags cpuflags | cpuflags_%2
740 %endif
741 %xdefine SUFFIX _ %+ cpuname
742 %if cpuflag(avx)
743 %assign avx_enabled 1
744 %endif
f2bd8a07
JR
745 %if mmsize == 16 && notcpuflag(sse2)
746 %define mova movaps
747 %define movu movups
748 %define movnta movntps
749 %endif
2f7f2e4b
LM
750 %if cpuflag(aligned)
751 %define movu mova
752 %elifidn %1, sse3
753 %define movu lddqu
754 %endif
0c0828ec 755 %if notcpuflag(sse2)
180d43bc 756 CPUNOP basicnop
2cd1f5ca 757 %endif
2f7f2e4b
LM
758 %else
759 %xdefine SUFFIX
760 %undef cpuname
761 %undef cpuflags
762 %endif
763%endmacro
764
bafad220
LM
765; merge mmx and sse*
766
767%macro CAT_XDEFINE 3
768 %xdefine %1%2 %3
769%endmacro
770
771%macro CAT_UNDEF 2
772 %undef %1%2
773%endmacro
774
2f7f2e4b 775%macro INIT_MMX 0-1+
33cbfa6f 776 %assign avx_enabled 0
2f7f2e4b 777 %define RESET_MM_PERMUTATION INIT_MMX %1
bafad220
LM
778 %define mmsize 8
779 %define num_mmregs 8
780 %define mova movq
781 %define movu movq
782 %define movh movd
532e7697 783 %define movnta movntq
bafad220
LM
784 %assign %%i 0
785 %rep 8
786 CAT_XDEFINE m, %%i, mm %+ %%i
787 CAT_XDEFINE nmm, %%i, %%i
788 %assign %%i %%i+1
789 %endrep
790 %rep 8
791 CAT_UNDEF m, %%i
792 CAT_UNDEF nmm, %%i
793 %assign %%i %%i+1
794 %endrep
2f7f2e4b 795 INIT_CPUFLAGS %1
bafad220
LM
796%endmacro
797
2f7f2e4b 798%macro INIT_XMM 0-1+
33cbfa6f 799 %assign avx_enabled 0
2f7f2e4b 800 %define RESET_MM_PERMUTATION INIT_XMM %1
bafad220
LM
801 %define mmsize 16
802 %define num_mmregs 8
3b15a6d7 803 %if ARCH_X86_64
bafad220
LM
804 %define num_mmregs 16
805 %endif
806 %define mova movdqa
807 %define movu movdqu
808 %define movh movq
532e7697 809 %define movnta movntdq
bafad220
LM
810 %assign %%i 0
811 %rep num_mmregs
812 CAT_XDEFINE m, %%i, xmm %+ %%i
813 CAT_XDEFINE nxmm, %%i, %%i
814 %assign %%i %%i+1
815 %endrep
2f7f2e4b 816 INIT_CPUFLAGS %1
bafad220
LM
817%endmacro
818
2f7f2e4b 819%macro INIT_YMM 0-1+
33cbfa6f 820 %assign avx_enabled 1
2f7f2e4b 821 %define RESET_MM_PERMUTATION INIT_YMM %1
33cbfa6f
VS
822 %define mmsize 32
823 %define num_mmregs 8
3b15a6d7 824 %if ARCH_X86_64
33cbfa6f
VS
825 %define num_mmregs 16
826 %endif
827 %define mova vmovaps
828 %define movu vmovups
2f7f2e4b
LM
829 %undef movh
830 %define movnta vmovntps
33cbfa6f
VS
831 %assign %%i 0
832 %rep num_mmregs
833 CAT_XDEFINE m, %%i, ymm %+ %%i
834 CAT_XDEFINE nymm, %%i, %%i
835 %assign %%i %%i+1
836 %endrep
2f7f2e4b 837 INIT_CPUFLAGS %1
33cbfa6f
VS
838%endmacro
839
2f7f2e4b 840INIT_XMM
bafad220
LM
841
842; I often want to use macros that permute their arguments. e.g. there's no
843; efficient way to implement butterfly or transpose or dct without swapping some
844; arguments.
845;
846; I would like to not have to manually keep track of the permutations:
847; If I insert a permutation in the middle of a function, it should automatically
848; change everything that follows. For more complex macros I may also have multiple
849; implementations, e.g. the SSE2 and SSSE3 versions may have different permutations.
850;
851; Hence these macros. Insert a PERMUTE or some SWAPs at the end of a macro that
852; permutes its arguments. It's equivalent to exchanging the contents of the
853; registers, except that this way you exchange the register names instead, so it
854; doesn't cost any cycles.
855
856%macro PERMUTE 2-* ; takes a list of pairs to swap
857%rep %0/2
858 %xdefine tmp%2 m%2
859 %xdefine ntmp%2 nm%2
860 %rotate 2
861%endrep
862%rep %0/2
863 %xdefine m%1 tmp%2
864 %xdefine nm%1 ntmp%2
865 %undef tmp%2
866 %undef ntmp%2
867 %rotate 2
868%endrep
869%endmacro
870
871%macro SWAP 2-* ; swaps a single chain (sometimes more concise than pairs)
872%rep %0-1
873%ifdef m%1
874 %xdefine tmp m%1
875 %xdefine m%1 m%2
876 %xdefine m%2 tmp
877 CAT_XDEFINE n, m%1, %1
878 CAT_XDEFINE n, m%2, %2
879%else
880 ; If we were called as "SWAP m0,m1" rather than "SWAP 0,1" infer the original numbers here.
881 ; Be careful using this mode in nested macros though, as in some cases there may be
882 ; other copies of m# that have already been dereferenced and don't get updated correctly.
883 %xdefine %%n1 n %+ %1
884 %xdefine %%n2 n %+ %2
885 %xdefine tmp m %+ %%n1
886 CAT_XDEFINE m, %%n1, m %+ %%n2
887 CAT_XDEFINE m, %%n2, tmp
888 CAT_XDEFINE n, m %+ %%n1, %%n1
889 CAT_XDEFINE n, m %+ %%n2, %%n2
890%endif
891 %undef tmp
892 %rotate 1
893%endrep
894%endmacro
895
2f7f2e4b
LM
896; If SAVE_MM_PERMUTATION is placed at the end of a function, then any later
897; calls to that function will automatically load the permutation, so values can
898; be returned in mmregs.
899%macro SAVE_MM_PERMUTATION 0-1
900 %if %0
901 %xdefine %%f %1_m
902 %else
903 %xdefine %%f current_function %+ _m
904 %endif
bafad220
LM
905 %assign %%i 0
906 %rep num_mmregs
2f7f2e4b 907 CAT_XDEFINE %%f, %%i, m %+ %%i
bafad220
LM
908 %assign %%i %%i+1
909 %endrep
910%endmacro
911
2966cc18 912%macro LOAD_MM_PERMUTATION 1 ; name to load from
2f7f2e4b
LM
913 %ifdef %1_m0
914 %assign %%i 0
915 %rep num_mmregs
916 CAT_XDEFINE m, %%i, %1_m %+ %%i
917 CAT_XDEFINE n, m %+ %%i, %%i
918 %assign %%i %%i+1
919 %endrep
920 %endif
bafad220
LM
921%endmacro
922
2f7f2e4b 923; Append cpuflags to the callee's name iff the appended name is known and the plain name isn't
bafad220 924%macro call 1
edd82267 925 call_internal %1 %+ SUFFIX, %1
2f7f2e4b
LM
926%endmacro
927%macro call_internal 2
edd82267
MR
928 %xdefine %%i %2
929 %ifndef cglobaled_%2
930 %ifdef cglobaled_%1
931 %xdefine %%i %1
2f7f2e4b 932 %endif
bafad220 933 %endif
2f7f2e4b
LM
934 call %%i
935 LOAD_MM_PERMUTATION %%i
bafad220
LM
936%endmacro
937
2966cc18 938; Substitutions that reduce instruction size but are functionally equivalent
3f87f39c
JA
939%macro add 2
940 %ifnum %2
941 %if %2==128
942 sub %1, -128
943 %else
944 add %1, %2
945 %endif
946 %else
947 add %1, %2
948 %endif
949%endmacro
950
951%macro sub 2
952 %ifnum %2
953 %if %2==128
954 add %1, -128
955 %else
956 sub %1, %2
957 %endif
958 %else
959 sub %1, %2
960 %endif
961%endmacro
33cbfa6f
VS
962
963;=============================================================================
964; AVX abstraction layer
965;=============================================================================
966
967%assign i 0
968%rep 16
969 %if i < 8
970 CAT_XDEFINE sizeofmm, i, 8
971 %endif
972 CAT_XDEFINE sizeofxmm, i, 16
973 CAT_XDEFINE sizeofymm, i, 32
974%assign i i+1
975%endrep
976%undef i
977
96c9cc10
RB
978%macro CHECK_AVX_INSTR_EMU 3-*
979 %xdefine %%opcode %1
980 %xdefine %%dst %2
981 %rep %0-2
982 %ifidn %%dst, %3
983 %error non-avx emulation of ``%%opcode'' is not supported
984 %endif
985 %rotate 1
986 %endrep
987%endmacro
988
33cbfa6f
VS
989;%1 == instruction
990;%2 == 1 if float, 0 if int
705f3d47 991;%3 == 1 if 4-operand (xmm, xmm, xmm, imm), 0 if 2- or 3-operand (xmm, xmm, xmm)
33cbfa6f
VS
992;%4 == number of operands given
993;%5+: operands
994%macro RUN_AVX_INSTR 6-7+
96c9cc10
RB
995 %ifid %6
996 %define %%sizeofreg sizeof%6
997 %elifid %5
998 %define %%sizeofreg sizeof%5
2f7f2e4b 999 %else
96c9cc10 1000 %define %%sizeofreg mmsize
2f7f2e4b 1001 %endif
96c9cc10
RB
1002 %if %%sizeofreg==32
1003 %if %4>=3
705f3d47
LM
1004 v%1 %5, %6, %7
1005 %else
1006 v%1 %5, %6
1007 %endif
33cbfa6f 1008 %else
96c9cc10 1009 %if %%sizeofreg==8
33cbfa6f
VS
1010 %define %%regmov movq
1011 %elif %2
1012 %define %%regmov movaps
1013 %else
1014 %define %%regmov movdqa
1015 %endif
1016
1017 %if %4>=3+%3
1018 %ifnidn %5, %6
96c9cc10 1019 %if avx_enabled && %%sizeofreg==16
33cbfa6f
VS
1020 v%1 %5, %6, %7
1021 %else
96c9cc10 1022 CHECK_AVX_INSTR_EMU {%1 %5, %6, %7}, %5, %7
33cbfa6f
VS
1023 %%regmov %5, %6
1024 %1 %5, %7
1025 %endif
1026 %else
1027 %1 %5, %7
1028 %endif
96c9cc10 1029 %elif %4>=3
33cbfa6f
VS
1030 %1 %5, %6, %7
1031 %else
1032 %1 %5, %6
1033 %endif
1034 %endif
1035%endmacro
1036
2f7f2e4b
LM
1037; 3arg AVX ops with a memory arg can only have it in src2,
1038; whereas SSE emulation of 3arg prefers to have it in src1 (i.e. the mov).
1039; So, if the op is symmetric and the wrong one is memory, swap them.
1040%macro RUN_AVX_INSTR1 8
1041 %assign %%swap 0
1042 %if avx_enabled
1043 %ifnid %6
1044 %assign %%swap 1
1045 %endif
1046 %elifnidn %5, %6
1047 %ifnid %7
1048 %assign %%swap 1
1049 %endif
1050 %endif
1051 %if %%swap && %3 == 0 && %8 == 1
1052 RUN_AVX_INSTR %1, %2, %3, %4, %5, %7, %6
1053 %else
1054 RUN_AVX_INSTR %1, %2, %3, %4, %5, %6, %7
1055 %endif
1056%endmacro
1057
33cbfa6f
VS
1058;%1 == instruction
1059;%2 == 1 if float, 0 if int
96c9cc10 1060;%3 == 1 if 4-operand (xmm, xmm, xmm, imm), 0 if 2- or 3-operand (xmm, xmm, xmm)
2f7f2e4b
LM
1061;%4 == 1 if symmetric (i.e. doesn't matter which src arg is which), 0 if not
1062%macro AVX_INSTR 4
1063 %macro %1 2-9 fnord, fnord, fnord, %1, %2, %3, %4
33cbfa6f
VS
1064 %ifidn %3, fnord
1065 RUN_AVX_INSTR %6, %7, %8, 2, %1, %2
1066 %elifidn %4, fnord
2f7f2e4b 1067 RUN_AVX_INSTR1 %6, %7, %8, 3, %1, %2, %3, %9
33cbfa6f
VS
1068 %elifidn %5, fnord
1069 RUN_AVX_INSTR %6, %7, %8, 4, %1, %2, %3, %4
1070 %else
1071 RUN_AVX_INSTR %6, %7, %8, 5, %1, %2, %3, %4, %5
1072 %endif
1073 %endmacro
1074%endmacro
1075
2f7f2e4b
LM
1076AVX_INSTR addpd, 1, 0, 1
1077AVX_INSTR addps, 1, 0, 1
1078AVX_INSTR addsd, 1, 0, 1
1079AVX_INSTR addss, 1, 0, 1
1080AVX_INSTR addsubpd, 1, 0, 0
1081AVX_INSTR addsubps, 1, 0, 0
1082AVX_INSTR andpd, 1, 0, 1
1083AVX_INSTR andps, 1, 0, 1
1084AVX_INSTR andnpd, 1, 0, 0
1085AVX_INSTR andnps, 1, 0, 0
1086AVX_INSTR blendpd, 1, 0, 0
1087AVX_INSTR blendps, 1, 0, 0
1088AVX_INSTR blendvpd, 1, 0, 0
1089AVX_INSTR blendvps, 1, 0, 0
2e81acc6
CG
1090AVX_INSTR cmppd, 1, 1, 0
1091AVX_INSTR cmpps, 1, 1, 0
1092AVX_INSTR cmpsd, 1, 1, 0
1093AVX_INSTR cmpss, 1, 1, 0
705f3d47 1094AVX_INSTR cvtdq2ps, 1, 0, 0
b30a3633 1095AVX_INSTR cvtpd2dq, 1, 0, 0
705f3d47 1096AVX_INSTR cvtps2dq, 1, 0, 0
2f7f2e4b
LM
1097AVX_INSTR divpd, 1, 0, 0
1098AVX_INSTR divps, 1, 0, 0
1099AVX_INSTR divsd, 1, 0, 0
1100AVX_INSTR divss, 1, 0, 0
1101AVX_INSTR dppd, 1, 1, 0
1102AVX_INSTR dpps, 1, 1, 0
1103AVX_INSTR haddpd, 1, 0, 0
1104AVX_INSTR haddps, 1, 0, 0
1105AVX_INSTR hsubpd, 1, 0, 0
1106AVX_INSTR hsubps, 1, 0, 0
1107AVX_INSTR maxpd, 1, 0, 1
1108AVX_INSTR maxps, 1, 0, 1
1109AVX_INSTR maxsd, 1, 0, 1
1110AVX_INSTR maxss, 1, 0, 1
1111AVX_INSTR minpd, 1, 0, 1
1112AVX_INSTR minps, 1, 0, 1
1113AVX_INSTR minsd, 1, 0, 1
1114AVX_INSTR minss, 1, 0, 1
39df0c43
VS
1115AVX_INSTR movhlps, 1, 0, 0
1116AVX_INSTR movlhps, 1, 0, 0
2f7f2e4b
LM
1117AVX_INSTR movsd, 1, 0, 0
1118AVX_INSTR movss, 1, 0, 0
1119AVX_INSTR mpsadbw, 0, 1, 0
1120AVX_INSTR mulpd, 1, 0, 1
1121AVX_INSTR mulps, 1, 0, 1
1122AVX_INSTR mulsd, 1, 0, 1
1123AVX_INSTR mulss, 1, 0, 1
1124AVX_INSTR orpd, 1, 0, 1
1125AVX_INSTR orps, 1, 0, 1
96c9cc10
RB
1126AVX_INSTR pabsb, 0, 0, 0
1127AVX_INSTR pabsw, 0, 0, 0
1128AVX_INSTR pabsd, 0, 0, 0
2f7f2e4b
LM
1129AVX_INSTR packsswb, 0, 0, 0
1130AVX_INSTR packssdw, 0, 0, 0
1131AVX_INSTR packuswb, 0, 0, 0
1132AVX_INSTR packusdw, 0, 0, 0
1133AVX_INSTR paddb, 0, 0, 1
1134AVX_INSTR paddw, 0, 0, 1
1135AVX_INSTR paddd, 0, 0, 1
1136AVX_INSTR paddq, 0, 0, 1
1137AVX_INSTR paddsb, 0, 0, 1
1138AVX_INSTR paddsw, 0, 0, 1
1139AVX_INSTR paddusb, 0, 0, 1
1140AVX_INSTR paddusw, 0, 0, 1
1141AVX_INSTR palignr, 0, 1, 0
1142AVX_INSTR pand, 0, 0, 1
1143AVX_INSTR pandn, 0, 0, 0
1144AVX_INSTR pavgb, 0, 0, 1
1145AVX_INSTR pavgw, 0, 0, 1
1146AVX_INSTR pblendvb, 0, 0, 0
1147AVX_INSTR pblendw, 0, 1, 0
1148AVX_INSTR pcmpestri, 0, 0, 0
1149AVX_INSTR pcmpestrm, 0, 0, 0
1150AVX_INSTR pcmpistri, 0, 0, 0
1151AVX_INSTR pcmpistrm, 0, 0, 0
1152AVX_INSTR pcmpeqb, 0, 0, 1
1153AVX_INSTR pcmpeqw, 0, 0, 1
1154AVX_INSTR pcmpeqd, 0, 0, 1
1155AVX_INSTR pcmpeqq, 0, 0, 1
1156AVX_INSTR pcmpgtb, 0, 0, 0
1157AVX_INSTR pcmpgtw, 0, 0, 0
1158AVX_INSTR pcmpgtd, 0, 0, 0
1159AVX_INSTR pcmpgtq, 0, 0, 0
1160AVX_INSTR phaddw, 0, 0, 0
1161AVX_INSTR phaddd, 0, 0, 0
1162AVX_INSTR phaddsw, 0, 0, 0
1163AVX_INSTR phsubw, 0, 0, 0
1164AVX_INSTR phsubd, 0, 0, 0
1165AVX_INSTR phsubsw, 0, 0, 0
1166AVX_INSTR pmaddwd, 0, 0, 1
1167AVX_INSTR pmaddubsw, 0, 0, 0
1168AVX_INSTR pmaxsb, 0, 0, 1
1169AVX_INSTR pmaxsw, 0, 0, 1
1170AVX_INSTR pmaxsd, 0, 0, 1
1171AVX_INSTR pmaxub, 0, 0, 1
1172AVX_INSTR pmaxuw, 0, 0, 1
1173AVX_INSTR pmaxud, 0, 0, 1
1174AVX_INSTR pminsb, 0, 0, 1
1175AVX_INSTR pminsw, 0, 0, 1
1176AVX_INSTR pminsd, 0, 0, 1
1177AVX_INSTR pminub, 0, 0, 1
1178AVX_INSTR pminuw, 0, 0, 1
1179AVX_INSTR pminud, 0, 0, 1
96c9cc10 1180AVX_INSTR pmovmskb, 0, 0, 0
2f7f2e4b
LM
1181AVX_INSTR pmulhuw, 0, 0, 1
1182AVX_INSTR pmulhrsw, 0, 0, 1
1183AVX_INSTR pmulhw, 0, 0, 1
1184AVX_INSTR pmullw, 0, 0, 1
1185AVX_INSTR pmulld, 0, 0, 1
1186AVX_INSTR pmuludq, 0, 0, 1
1187AVX_INSTR pmuldq, 0, 0, 1
1188AVX_INSTR por, 0, 0, 1
1189AVX_INSTR psadbw, 0, 0, 1
1190AVX_INSTR pshufb, 0, 0, 0
96c9cc10
RB
1191AVX_INSTR pshufd, 0, 1, 0
1192AVX_INSTR pshufhw, 0, 1, 0
1193AVX_INSTR pshuflw, 0, 1, 0
2f7f2e4b
LM
1194AVX_INSTR psignb, 0, 0, 0
1195AVX_INSTR psignw, 0, 0, 0
1196AVX_INSTR psignd, 0, 0, 0
1197AVX_INSTR psllw, 0, 0, 0
1198AVX_INSTR pslld, 0, 0, 0
1199AVX_INSTR psllq, 0, 0, 0
1200AVX_INSTR pslldq, 0, 0, 0
1201AVX_INSTR psraw, 0, 0, 0
1202AVX_INSTR psrad, 0, 0, 0
1203AVX_INSTR psrlw, 0, 0, 0
1204AVX_INSTR psrld, 0, 0, 0
1205AVX_INSTR psrlq, 0, 0, 0
1206AVX_INSTR psrldq, 0, 0, 0
1207AVX_INSTR psubb, 0, 0, 0
1208AVX_INSTR psubw, 0, 0, 0
1209AVX_INSTR psubd, 0, 0, 0
1210AVX_INSTR psubq, 0, 0, 0
1211AVX_INSTR psubsb, 0, 0, 0
1212AVX_INSTR psubsw, 0, 0, 0
1213AVX_INSTR psubusb, 0, 0, 0
1214AVX_INSTR psubusw, 0, 0, 0
96c9cc10 1215AVX_INSTR ptest, 0, 0, 0
2f7f2e4b
LM
1216AVX_INSTR punpckhbw, 0, 0, 0
1217AVX_INSTR punpckhwd, 0, 0, 0
1218AVX_INSTR punpckhdq, 0, 0, 0
1219AVX_INSTR punpckhqdq, 0, 0, 0
1220AVX_INSTR punpcklbw, 0, 0, 0
1221AVX_INSTR punpcklwd, 0, 0, 0
1222AVX_INSTR punpckldq, 0, 0, 0
1223AVX_INSTR punpcklqdq, 0, 0, 0
1224AVX_INSTR pxor, 0, 0, 1
6b6ee582 1225AVX_INSTR shufps, 1, 1, 0
2f7f2e4b
LM
1226AVX_INSTR subpd, 1, 0, 0
1227AVX_INSTR subps, 1, 0, 0
1228AVX_INSTR subsd, 1, 0, 0
1229AVX_INSTR subss, 1, 0, 0
1230AVX_INSTR unpckhpd, 1, 0, 0
1231AVX_INSTR unpckhps, 1, 0, 0
1232AVX_INSTR unpcklpd, 1, 0, 0
1233AVX_INSTR unpcklps, 1, 0, 0
1234AVX_INSTR xorpd, 1, 0, 1
1235AVX_INSTR xorps, 1, 0, 1
33cbfa6f
VS
1236
1237; 3DNow instructions, for sharing code between AVX, SSE and 3DN
2f7f2e4b
LM
1238AVX_INSTR pfadd, 1, 0, 1
1239AVX_INSTR pfsub, 1, 0, 0
1240AVX_INSTR pfmul, 1, 0, 1
1241
1242; base-4 constants for shuffles
1243%assign i 0
1244%rep 256
1245 %assign j ((i>>6)&3)*1000 + ((i>>4)&3)*100 + ((i>>2)&3)*10 + (i&3)
1246 %if j < 10
1247 CAT_XDEFINE q000, j, i
1248 %elif j < 100
1249 CAT_XDEFINE q00, j, i
1250 %elif j < 1000
1251 CAT_XDEFINE q0, j, i
1252 %else
1253 CAT_XDEFINE q, j, i
1254 %endif
1255%assign i i+1
1256%endrep
1257%undef i
1258%undef j
1259
1260%macro FMA_INSTR 3
79687079
JR
1261 %macro %1 5-8 %1, %2, %3
1262 %if cpuflag(xop) || cpuflag(fma4)
1263 v%6 %1, %2, %3, %4
2f7f2e4b 1264 %else
79687079
JR
1265 %ifidn %1, %4
1266 %7 %5, %2, %3
1267 %8 %1, %4, %5
1268 %else
1269 %7 %1, %2, %3
1270 %8 %1, %4
1271 %endif
2f7f2e4b
LM
1272 %endif
1273 %endmacro
1274%endmacro
1275
79687079 1276FMA_INSTR fmaddps, mulps, addps
2f7f2e4b
LM
1277FMA_INSTR pmacsdd, pmulld, paddd
1278FMA_INSTR pmacsww, pmullw, paddw
1279FMA_INSTR pmadcswd, pmaddwd, paddd
96c9cc10
RB
1280
1281; tzcnt is equivalent to "rep bsf" and is backwards-compatible with bsf.
1282; This lets us use tzcnt without bumping the yasm version requirement yet.
1283%define tzcnt rep bsf