361c6b637187e5033318bb9a7dd9ea3aed8fde7c
[libav.git] / libavcodec / i386 / mmx.h
1 /*
2 * mmx.h
3 * Copyright (C) 1997-2001 H. Dietz and R. Fisher
4 *
5 * This file is part of FFmpeg.
6 *
7 * FFmpeg is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
11 *
12 * FFmpeg is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with FFmpeg; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21 #ifndef FFMPEG_MMX_H
22 #define FFMPEG_MMX_H
23
24 #warning Everything in this header is deprecated, use plain asm()! New code using this header will be rejected.
25
26 /*
27 * The type of an value that fits in an MMX register (note that long
28 * long constant values MUST be suffixed by LL and unsigned long long
29 * values by ULL, lest they be truncated by the compiler)
30 */
31
32 typedef union {
33 long long q; /* Quadword (64-bit) value */
34 unsigned long long uq; /* Unsigned Quadword */
35 int d[2]; /* 2 Doubleword (32-bit) values */
36 unsigned int ud[2]; /* 2 Unsigned Doubleword */
37 short w[4]; /* 4 Word (16-bit) values */
38 unsigned short uw[4]; /* 4 Unsigned Word */
39 char b[8]; /* 8 Byte (8-bit) values */
40 unsigned char ub[8]; /* 8 Unsigned Byte */
41 float s[2]; /* Single-precision (32-bit) value */
42 } mmx_t; /* On an 8-byte (64-bit) boundary */
43
44
45 #define mmx_i2r(op,imm,reg) \
46 asm volatile (#op " %0, %%" #reg \
47 : /* nothing */ \
48 : "i" (imm) )
49
50 #define mmx_m2r(op,mem,reg) \
51 asm volatile (#op " %0, %%" #reg \
52 : /* nothing */ \
53 : "m" (mem))
54
55 #define mmx_r2m(op,reg,mem) \
56 asm volatile (#op " %%" #reg ", %0" \
57 : "=m" (mem) \
58 : /* nothing */ )
59
60 #define mmx_r2r(op,regs,regd) \
61 asm volatile (#op " %" #regs ", %" #regd)
62
63
64 #define emms() asm volatile ("emms")
65
66 #define movd_m2r(var,reg) mmx_m2r (movd, var, reg)
67 #define movd_r2m(reg,var) mmx_r2m (movd, reg, var)
68 #define movd_r2r(regs,regd) mmx_r2r (movd, regs, regd)
69
70 #define movq_m2r(var,reg) mmx_m2r (movq, var, reg)
71 #define movq_r2m(reg,var) mmx_r2m (movq, reg, var)
72 #define movq_r2r(regs,regd) mmx_r2r (movq, regs, regd)
73
74 #define packssdw_m2r(var,reg) mmx_m2r (packssdw, var, reg)
75 #define packssdw_r2r(regs,regd) mmx_r2r (packssdw, regs, regd)
76 #define packsswb_m2r(var,reg) mmx_m2r (packsswb, var, reg)
77 #define packsswb_r2r(regs,regd) mmx_r2r (packsswb, regs, regd)
78
79 #define packuswb_m2r(var,reg) mmx_m2r (packuswb, var, reg)
80 #define packuswb_r2r(regs,regd) mmx_r2r (packuswb, regs, regd)
81
82 #define paddb_m2r(var,reg) mmx_m2r (paddb, var, reg)
83 #define paddb_r2r(regs,regd) mmx_r2r (paddb, regs, regd)
84 #define paddd_m2r(var,reg) mmx_m2r (paddd, var, reg)
85 #define paddd_r2r(regs,regd) mmx_r2r (paddd, regs, regd)
86 #define paddw_m2r(var,reg) mmx_m2r (paddw, var, reg)
87 #define paddw_r2r(regs,regd) mmx_r2r (paddw, regs, regd)
88
89 #define paddsb_m2r(var,reg) mmx_m2r (paddsb, var, reg)
90 #define paddsb_r2r(regs,regd) mmx_r2r (paddsb, regs, regd)
91 #define paddsw_m2r(var,reg) mmx_m2r (paddsw, var, reg)
92 #define paddsw_r2r(regs,regd) mmx_r2r (paddsw, regs, regd)
93
94 #define paddusb_m2r(var,reg) mmx_m2r (paddusb, var, reg)
95 #define paddusb_r2r(regs,regd) mmx_r2r (paddusb, regs, regd)
96 #define paddusw_m2r(var,reg) mmx_m2r (paddusw, var, reg)
97 #define paddusw_r2r(regs,regd) mmx_r2r (paddusw, regs, regd)
98
99 #define pand_m2r(var,reg) mmx_m2r (pand, var, reg)
100 #define pand_r2r(regs,regd) mmx_r2r (pand, regs, regd)
101
102 #define pandn_m2r(var,reg) mmx_m2r (pandn, var, reg)
103 #define pandn_r2r(regs,regd) mmx_r2r (pandn, regs, regd)
104
105 #define pcmpeqb_m2r(var,reg) mmx_m2r (pcmpeqb, var, reg)
106 #define pcmpeqb_r2r(regs,regd) mmx_r2r (pcmpeqb, regs, regd)
107 #define pcmpeqd_m2r(var,reg) mmx_m2r (pcmpeqd, var, reg)
108 #define pcmpeqd_r2r(regs,regd) mmx_r2r (pcmpeqd, regs, regd)
109 #define pcmpeqw_m2r(var,reg) mmx_m2r (pcmpeqw, var, reg)
110 #define pcmpeqw_r2r(regs,regd) mmx_r2r (pcmpeqw, regs, regd)
111
112 #define pcmpgtb_m2r(var,reg) mmx_m2r (pcmpgtb, var, reg)
113 #define pcmpgtb_r2r(regs,regd) mmx_r2r (pcmpgtb, regs, regd)
114 #define pcmpgtd_m2r(var,reg) mmx_m2r (pcmpgtd, var, reg)
115 #define pcmpgtd_r2r(regs,regd) mmx_r2r (pcmpgtd, regs, regd)
116 #define pcmpgtw_m2r(var,reg) mmx_m2r (pcmpgtw, var, reg)
117 #define pcmpgtw_r2r(regs,regd) mmx_r2r (pcmpgtw, regs, regd)
118
119 #define pmaddwd_m2r(var,reg) mmx_m2r (pmaddwd, var, reg)
120 #define pmaddwd_r2r(regs,regd) mmx_r2r (pmaddwd, regs, regd)
121
122 #define pmulhw_m2r(var,reg) mmx_m2r (pmulhw, var, reg)
123 #define pmulhw_r2r(regs,regd) mmx_r2r (pmulhw, regs, regd)
124
125 #define pmullw_m2r(var,reg) mmx_m2r (pmullw, var, reg)
126 #define pmullw_r2r(regs,regd) mmx_r2r (pmullw, regs, regd)
127
128 #define por_m2r(var,reg) mmx_m2r (por, var, reg)
129 #define por_r2r(regs,regd) mmx_r2r (por, regs, regd)
130
131 #define pslld_i2r(imm,reg) mmx_i2r (pslld, imm, reg)
132 #define pslld_m2r(var,reg) mmx_m2r (pslld, var, reg)
133 #define pslld_r2r(regs,regd) mmx_r2r (pslld, regs, regd)
134 #define psllq_i2r(imm,reg) mmx_i2r (psllq, imm, reg)
135 #define psllq_m2r(var,reg) mmx_m2r (psllq, var, reg)
136 #define psllq_r2r(regs,regd) mmx_r2r (psllq, regs, regd)
137 #define psllw_i2r(imm,reg) mmx_i2r (psllw, imm, reg)
138 #define psllw_m2r(var,reg) mmx_m2r (psllw, var, reg)
139 #define psllw_r2r(regs,regd) mmx_r2r (psllw, regs, regd)
140
141 #define psrad_i2r(imm,reg) mmx_i2r (psrad, imm, reg)
142 #define psrad_m2r(var,reg) mmx_m2r (psrad, var, reg)
143 #define psrad_r2r(regs,regd) mmx_r2r (psrad, regs, regd)
144 #define psraw_i2r(imm,reg) mmx_i2r (psraw, imm, reg)
145 #define psraw_m2r(var,reg) mmx_m2r (psraw, var, reg)
146 #define psraw_r2r(regs,regd) mmx_r2r (psraw, regs, regd)
147
148 #define psrld_i2r(imm,reg) mmx_i2r (psrld, imm, reg)
149 #define psrld_m2r(var,reg) mmx_m2r (psrld, var, reg)
150 #define psrld_r2r(regs,regd) mmx_r2r (psrld, regs, regd)
151 #define psrlq_i2r(imm,reg) mmx_i2r (psrlq, imm, reg)
152 #define psrlq_m2r(var,reg) mmx_m2r (psrlq, var, reg)
153 #define psrlq_r2r(regs,regd) mmx_r2r (psrlq, regs, regd)
154 #define psrlw_i2r(imm,reg) mmx_i2r (psrlw, imm, reg)
155 #define psrlw_m2r(var,reg) mmx_m2r (psrlw, var, reg)
156 #define psrlw_r2r(regs,regd) mmx_r2r (psrlw, regs, regd)
157
158 #define psubb_m2r(var,reg) mmx_m2r (psubb, var, reg)
159 #define psubb_r2r(regs,regd) mmx_r2r (psubb, regs, regd)
160 #define psubd_m2r(var,reg) mmx_m2r (psubd, var, reg)
161 #define psubd_r2r(regs,regd) mmx_r2r (psubd, regs, regd)
162 #define psubw_m2r(var,reg) mmx_m2r (psubw, var, reg)
163 #define psubw_r2r(regs,regd) mmx_r2r (psubw, regs, regd)
164
165 #define psubsb_m2r(var,reg) mmx_m2r (psubsb, var, reg)
166 #define psubsb_r2r(regs,regd) mmx_r2r (psubsb, regs, regd)
167 #define psubsw_m2r(var,reg) mmx_m2r (psubsw, var, reg)
168 #define psubsw_r2r(regs,regd) mmx_r2r (psubsw, regs, regd)
169
170 #define psubusb_m2r(var,reg) mmx_m2r (psubusb, var, reg)
171 #define psubusb_r2r(regs,regd) mmx_r2r (psubusb, regs, regd)
172 #define psubusw_m2r(var,reg) mmx_m2r (psubusw, var, reg)
173 #define psubusw_r2r(regs,regd) mmx_r2r (psubusw, regs, regd)
174
175 #define punpckhbw_m2r(var,reg) mmx_m2r (punpckhbw, var, reg)
176 #define punpckhbw_r2r(regs,regd) mmx_r2r (punpckhbw, regs, regd)
177 #define punpckhdq_m2r(var,reg) mmx_m2r (punpckhdq, var, reg)
178 #define punpckhdq_r2r(regs,regd) mmx_r2r (punpckhdq, regs, regd)
179 #define punpckhwd_m2r(var,reg) mmx_m2r (punpckhwd, var, reg)
180 #define punpckhwd_r2r(regs,regd) mmx_r2r (punpckhwd, regs, regd)
181
182 #define punpcklbw_m2r(var,reg) mmx_m2r (punpcklbw, var, reg)
183 #define punpcklbw_r2r(regs,regd) mmx_r2r (punpcklbw, regs, regd)
184 #define punpckldq_m2r(var,reg) mmx_m2r (punpckldq, var, reg)
185 #define punpckldq_r2r(regs,regd) mmx_r2r (punpckldq, regs, regd)
186 #define punpcklwd_m2r(var,reg) mmx_m2r (punpcklwd, var, reg)
187 #define punpcklwd_r2r(regs,regd) mmx_r2r (punpcklwd, regs, regd)
188
189 #define pxor_m2r(var,reg) mmx_m2r (pxor, var, reg)
190 #define pxor_r2r(regs,regd) mmx_r2r (pxor, regs, regd)
191
192
193 /* 3DNOW extensions */
194
195 #define pavgusb_m2r(var,reg) mmx_m2r (pavgusb, var, reg)
196 #define pavgusb_r2r(regs,regd) mmx_r2r (pavgusb, regs, regd)
197
198
199 /* AMD MMX extensions - also available in intel SSE */
200
201
202 #define mmx_m2ri(op,mem,reg,imm) \
203 asm volatile (#op " %1, %0, %%" #reg \
204 : /* nothing */ \
205 : "m" (mem), "i" (imm))
206 #define mmx_r2ri(op,regs,regd,imm) \
207 asm volatile (#op " %0, %%" #regs ", %%" #regd \
208 : /* nothing */ \
209 : "i" (imm) )
210
211 #define mmx_fetch(mem,hint) \
212 asm volatile ("prefetch" #hint " %0" \
213 : /* nothing */ \
214 : "m" (mem))
215
216
217 #define maskmovq(regs,maskreg) mmx_r2ri (maskmovq, regs, maskreg)
218
219 #define movntq_r2m(mmreg,var) mmx_r2m (movntq, mmreg, var)
220
221 #define pavgb_m2r(var,reg) mmx_m2r (pavgb, var, reg)
222 #define pavgb_r2r(regs,regd) mmx_r2r (pavgb, regs, regd)
223 #define pavgw_m2r(var,reg) mmx_m2r (pavgw, var, reg)
224 #define pavgw_r2r(regs,regd) mmx_r2r (pavgw, regs, regd)
225
226 #define pextrw_r2r(mmreg,reg,imm) mmx_r2ri (pextrw, mmreg, reg, imm)
227
228 #define pinsrw_r2r(reg,mmreg,imm) mmx_r2ri (pinsrw, reg, mmreg, imm)
229
230 #define pmaxsw_m2r(var,reg) mmx_m2r (pmaxsw, var, reg)
231 #define pmaxsw_r2r(regs,regd) mmx_r2r (pmaxsw, regs, regd)
232
233 #define pmaxub_m2r(var,reg) mmx_m2r (pmaxub, var, reg)
234 #define pmaxub_r2r(regs,regd) mmx_r2r (pmaxub, regs, regd)
235
236 #define pminsw_m2r(var,reg) mmx_m2r (pminsw, var, reg)
237 #define pminsw_r2r(regs,regd) mmx_r2r (pminsw, regs, regd)
238
239 #define pminub_m2r(var,reg) mmx_m2r (pminub, var, reg)
240 #define pminub_r2r(regs,regd) mmx_r2r (pminub, regs, regd)
241
242 #define pmovmskb(mmreg,reg) \
243 asm volatile ("movmskps %" #mmreg ", %" #reg)
244
245 #define pmulhuw_m2r(var,reg) mmx_m2r (pmulhuw, var, reg)
246 #define pmulhuw_r2r(regs,regd) mmx_r2r (pmulhuw, regs, regd)
247
248 #define prefetcht0(mem) mmx_fetch (mem, t0)
249 #define prefetcht1(mem) mmx_fetch (mem, t1)
250 #define prefetcht2(mem) mmx_fetch (mem, t2)
251 #define prefetchnta(mem) mmx_fetch (mem, nta)
252
253 #define psadbw_m2r(var,reg) mmx_m2r (psadbw, var, reg)
254 #define psadbw_r2r(regs,regd) mmx_r2r (psadbw, regs, regd)
255
256 #define pshufw_m2r(var,reg,imm) mmx_m2ri(pshufw, var, reg, imm)
257 #define pshufw_r2r(regs,regd,imm) mmx_r2ri(pshufw, regs, regd, imm)
258
259 #define sfence() asm volatile ("sfence\n\t")
260
261 /* SSE2 */
262 #define pshufhw_m2r(var,reg,imm) mmx_m2ri(pshufhw, var, reg, imm)
263 #define pshufhw_r2r(regs,regd,imm) mmx_r2ri(pshufhw, regs, regd, imm)
264 #define pshuflw_m2r(var,reg,imm) mmx_m2ri(pshuflw, var, reg, imm)
265 #define pshuflw_r2r(regs,regd,imm) mmx_r2ri(pshuflw, regs, regd, imm)
266
267 #define pshufd_r2r(regs,regd,imm) mmx_r2ri(pshufd, regs, regd, imm)
268
269 #define movdqa_m2r(var,reg) mmx_m2r (movdqa, var, reg)
270 #define movdqa_r2m(reg,var) mmx_r2m (movdqa, reg, var)
271 #define movdqa_r2r(regs,regd) mmx_r2r (movdqa, regs, regd)
272 #define movdqu_m2r(var,reg) mmx_m2r (movdqu, var, reg)
273 #define movdqu_r2m(reg,var) mmx_r2m (movdqu, reg, var)
274 #define movdqu_r2r(regs,regd) mmx_r2r (movdqu, regs, regd)
275
276 #define pmullw_r2m(reg,var) mmx_r2m (pmullw, reg, var)
277
278 #define pslldq_i2r(imm,reg) mmx_i2r (pslldq, imm, reg)
279 #define psrldq_i2r(imm,reg) mmx_i2r (psrldq, imm, reg)
280
281 #define punpcklqdq_r2r(regs,regd) mmx_r2r (punpcklqdq, regs, regd)
282 #define punpckhqdq_r2r(regs,regd) mmx_r2r (punpckhqdq, regs, regd)
283
284
285 #endif /* FFMPEG_MMX_H */