Altivec on non darwin systems patch by Romain Dolbeau
[libav.git] / libavcodec / ppc / dsputil_ppc.c
1 /*
2 * Copyright (c) 2002 Brian Foley
3 * Copyright (c) 2002 Dieter Shirley
4 *
5 * This library is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU Lesser General Public
7 * License as published by the Free Software Foundation; either
8 * version 2 of the License, or (at your option) any later version.
9 *
10 * This library is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * Lesser General Public License for more details.
14 *
15 * You should have received a copy of the GNU Lesser General Public
16 * License along with this library; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20 #include "../dsputil.h"
21
22 #include "dsputil_ppc.h"
23
24 #ifdef HAVE_ALTIVEC
25 #include "dsputil_altivec.h"
26 #endif
27
28 int mm_flags = 0;
29
30 int mm_support(void)
31 {
32 int result = 0;
33 #if HAVE_ALTIVEC
34 if (has_altivec()) {
35 result |= MM_ALTIVEC;
36 }
37 #endif /* result */
38 return result;
39 }
40
41 #ifdef POWERPC_TBL_PERFORMANCE_REPORT
42 unsigned long long perfdata[powerpc_perf_total][powerpc_data_total];
43 /* list below must match enum in dsputil_ppc.h */
44 static unsigned char* perfname[] = {
45 "fft_calc_altivec",
46 "gmc1_altivec",
47 "dct_unquantize_h263_altivec",
48 "idct_add_altivec",
49 "idct_put_altivec",
50 "put_pixels16_altivec",
51 "avg_pixels16_altivec",
52 "avg_pixels8_altivec",
53 "put_pixels8_xy2_altivec",
54 "put_no_rnd_pixels8_xy2_altivec",
55 "put_pixels16_xy2_altivec",
56 "put_no_rnd_pixels16_xy2_altivec",
57 "clear_blocks_dcbz32_ppc"
58 };
59 #ifdef POWERPC_PERF_USE_PMC
60 unsigned long long perfdata_miss[powerpc_perf_total][powerpc_data_total];
61 #endif
62 #include <stdio.h>
63 #endif
64
65 #ifdef POWERPC_TBL_PERFORMANCE_REPORT
66 void powerpc_display_perf_report(void)
67 {
68 int i;
69 #ifndef POWERPC_PERF_USE_PMC
70 fprintf(stderr, "PowerPC performance report\n Values are from the Time Base register, and represent 4 bus cycles.\n");
71 #else /* POWERPC_PERF_USE_PMC */
72 fprintf(stderr, "PowerPC performance report\n Values are from the PMC registers, and represent whatever the registers are set to record.\n");
73 #endif /* POWERPC_PERF_USE_PMC */
74 for(i = 0 ; i < powerpc_perf_total ; i++)
75 {
76 if (perfdata[i][powerpc_data_num] != (unsigned long long)0)
77 fprintf(stderr, " Function \"%s\" (pmc1):\n\tmin: %llu\n\tmax: %llu\n\tavg: %1.2lf (%llu)\n",
78 perfname[i],
79 perfdata[i][powerpc_data_min],
80 perfdata[i][powerpc_data_max],
81 (double)perfdata[i][powerpc_data_sum] /
82 (double)perfdata[i][powerpc_data_num],
83 perfdata[i][powerpc_data_num]);
84 #ifdef POWERPC_PERF_USE_PMC
85 if (perfdata_miss[i][powerpc_data_num] != (unsigned long long)0)
86 fprintf(stderr, " Function \"%s\" (pmc2):\n\tmin: %llu\n\tmax: %llu\n\tavg: %1.2lf (%llu)\n",
87 perfname[i],
88 perfdata_miss[i][powerpc_data_min],
89 perfdata_miss[i][powerpc_data_max],
90 (double)perfdata_miss[i][powerpc_data_sum] /
91 (double)perfdata_miss[i][powerpc_data_num],
92 perfdata_miss[i][powerpc_data_num]);
93 #endif
94 }
95 }
96 #endif /* POWERPC_TBL_PERFORMANCE_REPORT */
97
98 /* ***** WARNING ***** WARNING ***** WARNING ***** */
99 /*
100 clear_blocks_dcbz32_ppc will not work properly
101 on PowerPC processors with a cache line size
102 not equal to 32 bytes.
103 Fortunately all processor used by Apple up to
104 at least the 7450 (aka second generation G4)
105 use 32 bytes cache line.
106 This is due to the use of the 'dcbz' instruction.
107 It simply clear to zero a single cache line,
108 so you need to know the cache line size to use it !
109 It's absurd, but it's fast...
110 */
111 void clear_blocks_dcbz32_ppc(DCTELEM *blocks)
112 {
113 POWERPC_TBL_DECLARE(powerpc_clear_blocks_dcbz32, 1);
114 register int misal = ((unsigned long)blocks & 0x00000010);
115 register int i = 0;
116 POWERPC_TBL_START_COUNT(powerpc_clear_blocks_dcbz32, 1);
117 #if 1
118 if (misal) {
119 ((unsigned long*)blocks)[0] = 0L;
120 ((unsigned long*)blocks)[1] = 0L;
121 ((unsigned long*)blocks)[2] = 0L;
122 ((unsigned long*)blocks)[3] = 0L;
123 i += 16;
124 }
125 for ( ; i < sizeof(DCTELEM)*6*64 ; i += 32) {
126 asm volatile("dcbz %0,%1" : : "r" (blocks), "r" (i) : "memory");
127 }
128 if (misal) {
129 ((unsigned long*)blocks)[188] = 0L;
130 ((unsigned long*)blocks)[189] = 0L;
131 ((unsigned long*)blocks)[190] = 0L;
132 ((unsigned long*)blocks)[191] = 0L;
133 i += 16;
134 }
135 #else
136 memset(blocks, 0, sizeof(DCTELEM)*6*64);
137 #endif
138 POWERPC_TBL_STOP_COUNT(powerpc_clear_blocks_dcbz32, 1);
139 }
140
141 /* check dcbz report how many bytes are set to 0 by dcbz */
142 long check_dcbz_effect(void)
143 {
144 register char *fakedata = (char*)av_malloc(1024);
145 register char *fakedata_middle;
146 register long zero = 0;
147 register long i = 0;
148 long count = 0;
149
150 if (!fakedata)
151 {
152 return 0L;
153 }
154
155 fakedata_middle = (fakedata + 512);
156
157 memset(fakedata, 0xFF, 1024);
158
159 asm volatile("dcbz %0, %1" : : "r" (fakedata_middle), "r" (zero));
160
161 for (i = 0; i < 1024 ; i ++)
162 {
163 if (fakedata[i] == (char)0)
164 count++;
165 }
166
167 av_free(fakedata);
168
169 return count;
170 }
171
172 void dsputil_init_ppc(DSPContext* c, unsigned mask)
173 {
174 // Common optimisations whether Altivec or not
175
176 switch (check_dcbz_effect()) {
177 case 32:
178 c->clear_blocks = clear_blocks_dcbz32_ppc;
179 break;
180 default:
181 break;
182 }
183
184 #if HAVE_ALTIVEC
185 if (has_altivec()) {
186 mm_flags |= MM_ALTIVEC;
187
188 // Altivec specific optimisations
189 c->pix_abs16x16_x2 = pix_abs16x16_x2_altivec;
190 c->pix_abs16x16_y2 = pix_abs16x16_y2_altivec;
191 c->pix_abs16x16_xy2 = pix_abs16x16_xy2_altivec;
192 c->pix_abs16x16 = pix_abs16x16_altivec;
193 c->pix_abs8x8 = pix_abs8x8_altivec;
194 c->sad[0]= sad16x16_altivec;
195 c->sad[1]= sad8x8_altivec;
196 c->pix_norm1 = pix_norm1_altivec;
197 c->sse[1]= sse8_altivec;
198 c->sse[0]= sse16_altivec;
199 c->pix_sum = pix_sum_altivec;
200 c->diff_pixels = diff_pixels_altivec;
201 c->get_pixels = get_pixels_altivec;
202 // next one disabled as it's untested.
203 #if 0
204 c->add_bytes= add_bytes_altivec;
205 #endif /* 0 */
206 c->put_pixels_tab[0][0] = put_pixels16_altivec;
207 c->avg_pixels_tab[0][0] = avg_pixels16_altivec;
208 // next one disabled as it's untested.
209 #if 0
210 c->avg_pixels_tab[1][0] = avg_pixels8_altivec;
211 #endif /* 0 */
212 c->put_pixels_tab[1][3] = put_pixels8_xy2_altivec;
213 c->put_no_rnd_pixels_tab[1][3] = put_no_rnd_pixels8_xy2_altivec;
214 c->put_pixels_tab[0][3] = put_pixels16_xy2_altivec;
215 c->put_no_rnd_pixels_tab[0][3] = put_no_rnd_pixels16_xy2_altivec;
216
217 c->gmc1 = gmc1_altivec;
218
219 #ifdef POWERPC_TBL_PERFORMANCE_REPORT
220 {
221 int i;
222 for (i = 0 ; i < powerpc_perf_total ; i++)
223 {
224 perfdata[i][powerpc_data_min] = 0xFFFFFFFFFFFFFFFF;
225 perfdata[i][powerpc_data_max] = 0x0000000000000000;
226 perfdata[i][powerpc_data_sum] = 0x0000000000000000;
227 perfdata[i][powerpc_data_num] = 0x0000000000000000;
228 #ifdef POWERPC_PERF_USE_PMC
229 perfdata_miss[i][powerpc_data_min] = 0xFFFFFFFFFFFFFFFF;
230 perfdata_miss[i][powerpc_data_max] = 0x0000000000000000;
231 perfdata_miss[i][powerpc_data_sum] = 0x0000000000000000;
232 perfdata_miss[i][powerpc_data_num] = 0x0000000000000000;
233 #endif /* POWERPC_PERF_USE_PMC */
234 }
235 }
236 #endif /* POWERPC_TBL_PERFORMANCE_REPORT */
237 } else
238 #endif /* HAVE_ALTIVEC */
239 {
240 // Non-AltiVec PPC optimisations
241
242 // ... pending ...
243 }
244 }