x86: add detection for Bit Manipulation Instruction sets
[libav.git] / libavutil / cpu.h
1 /*
2 * Copyright (c) 2000, 2001, 2002 Fabrice Bellard
3 *
4 * This file is part of Libav.
5 *
6 * Libav is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
10 *
11 * Libav is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with Libav; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21 #ifndef AVUTIL_CPU_H
22 #define AVUTIL_CPU_H
23
24 #include "version.h"
25
26 #define AV_CPU_FLAG_FORCE 0x80000000 /* force usage of selected flags (OR) */
27
28 /* lower 16 bits - CPU features */
29 #define AV_CPU_FLAG_MMX 0x0001 ///< standard MMX
30 #define AV_CPU_FLAG_MMXEXT 0x0002 ///< SSE integer functions or AMD MMX ext
31 #if FF_API_CPU_FLAG_MMX2
32 #define AV_CPU_FLAG_MMX2 0x0002 ///< SSE integer functions or AMD MMX ext
33 #endif
34 #define AV_CPU_FLAG_3DNOW 0x0004 ///< AMD 3DNOW
35 #define AV_CPU_FLAG_SSE 0x0008 ///< SSE functions
36 #define AV_CPU_FLAG_SSE2 0x0010 ///< PIV SSE2 functions
37 #define AV_CPU_FLAG_SSE2SLOW 0x40000000 ///< SSE2 supported, but usually not faster
38 ///< than regular MMX/SSE (e.g. Core1)
39 #define AV_CPU_FLAG_3DNOWEXT 0x0020 ///< AMD 3DNowExt
40 #define AV_CPU_FLAG_SSE3 0x0040 ///< Prescott SSE3 functions
41 #define AV_CPU_FLAG_SSE3SLOW 0x20000000 ///< SSE3 supported, but usually not faster
42 ///< than regular MMX/SSE (e.g. Core1)
43 #define AV_CPU_FLAG_SSSE3 0x0080 ///< Conroe SSSE3 functions
44 #define AV_CPU_FLAG_ATOM 0x10000000 ///< Atom processor, some SSSE3 instructions are slower
45 #define AV_CPU_FLAG_SSE4 0x0100 ///< Penryn SSE4.1 functions
46 #define AV_CPU_FLAG_SSE42 0x0200 ///< Nehalem SSE4.2 functions
47 #define AV_CPU_FLAG_AVX 0x4000 ///< AVX functions: requires OS support even if YMM registers aren't used
48 #define AV_CPU_FLAG_XOP 0x0400 ///< Bulldozer XOP functions
49 #define AV_CPU_FLAG_FMA4 0x0800 ///< Bulldozer FMA4 functions
50 #define AV_CPU_FLAG_CMOV 0x1000 ///< i686 cmov
51 #define AV_CPU_FLAG_AVX2 0x8000 ///< AVX2 functions: requires OS support even if YMM registers aren't used
52 #define AV_CPU_FLAG_FMA3 0x10000 ///< Haswell FMA3 functions
53 #define AV_CPU_FLAG_BMI1 0x20000 ///< Bit Manipulation Instruction Set 1
54 #define AV_CPU_FLAG_BMI2 0x40000 ///< Bit Manipulation Instruction Set 2
55
56 #define AV_CPU_FLAG_ALTIVEC 0x0001 ///< standard
57
58 #define AV_CPU_FLAG_ARMV5TE (1 << 0)
59 #define AV_CPU_FLAG_ARMV6 (1 << 1)
60 #define AV_CPU_FLAG_ARMV6T2 (1 << 2)
61 #define AV_CPU_FLAG_VFP (1 << 3)
62 #define AV_CPU_FLAG_VFPV3 (1 << 4)
63 #define AV_CPU_FLAG_NEON (1 << 5)
64
65 /**
66 * Return the flags which specify extensions supported by the CPU.
67 */
68 int av_get_cpu_flags(void);
69
70 /**
71 * Set a mask on flags returned by av_get_cpu_flags().
72 * This function is mainly useful for testing.
73 *
74 * @warning this function is not thread safe.
75 */
76 void av_set_cpu_flags_mask(int mask);
77
78 /**
79 * Parse CPU flags from a string.
80 *
81 * @return a combination of AV_CPU_* flags, negative on error.
82 */
83 int av_parse_cpu_flags(const char *s);
84
85 /**
86 * @return the number of logical CPU cores present.
87 */
88 int av_cpu_count(void);
89
90 #endif /* AVUTIL_CPU_H */