x86inc: Preserve arguments when allocating stack space
[libav.git] / libavutil / x86 / x86inc.asm
1 ;*****************************************************************************
2 ;* x86inc.asm: x264asm abstraction layer
3 ;*****************************************************************************
4 ;* Copyright (C) 2005-2016 x264 project
5 ;*
6 ;* Authors: Loren Merritt <lorenm@u.washington.edu>
7 ;* Anton Mitrofanov <BugMaster@narod.ru>
8 ;* Fiona Glaser <fiona@x264.com>
9 ;* Henrik Gramner <henrik@gramner.com>
10 ;*
11 ;* Permission to use, copy, modify, and/or distribute this software for any
12 ;* purpose with or without fee is hereby granted, provided that the above
13 ;* copyright notice and this permission notice appear in all copies.
14 ;*
15 ;* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
16 ;* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
17 ;* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
18 ;* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
19 ;* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
20 ;* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
21 ;* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
22 ;*****************************************************************************
23
24 ; This is a header file for the x264ASM assembly language, which uses
25 ; NASM/YASM syntax combined with a large number of macros to provide easy
26 ; abstraction between different calling conventions (x86_32, win64, linux64).
27 ; It also has various other useful features to simplify writing the kind of
28 ; DSP functions that are most often used in x264.
29
30 ; Unlike the rest of x264, this file is available under an ISC license, as it
31 ; has significant usefulness outside of x264 and we want it to be available
32 ; to the largest audience possible. Of course, if you modify it for your own
33 ; purposes to add a new feature, we strongly encourage contributing a patch
34 ; as this feature might be useful for others as well. Send patches or ideas
35 ; to x264-devel@videolan.org .
36
37 %ifndef private_prefix
38 %define private_prefix x264
39 %endif
40
41 %ifndef public_prefix
42 %define public_prefix private_prefix
43 %endif
44
45 %if HAVE_ALIGNED_STACK
46 %define STACK_ALIGNMENT 16
47 %endif
48 %ifndef STACK_ALIGNMENT
49 %if ARCH_X86_64
50 %define STACK_ALIGNMENT 16
51 %else
52 %define STACK_ALIGNMENT 4
53 %endif
54 %endif
55
56 %define WIN64 0
57 %define UNIX64 0
58 %if ARCH_X86_64
59 %ifidn __OUTPUT_FORMAT__,win32
60 %define WIN64 1
61 %elifidn __OUTPUT_FORMAT__,win64
62 %define WIN64 1
63 %elifidn __OUTPUT_FORMAT__,x64
64 %define WIN64 1
65 %else
66 %define UNIX64 1
67 %endif
68 %endif
69
70 %define FORMAT_ELF 0
71 %ifidn __OUTPUT_FORMAT__,elf
72 %define FORMAT_ELF 1
73 %elifidn __OUTPUT_FORMAT__,elf32
74 %define FORMAT_ELF 1
75 %elifidn __OUTPUT_FORMAT__,elf64
76 %define FORMAT_ELF 1
77 %endif
78
79 %ifdef PREFIX
80 %define mangle(x) _ %+ x
81 %else
82 %define mangle(x) x
83 %endif
84
85 ; aout does not support align=
86 ; NOTE: This section is out of sync with x264, in order to
87 ; keep supporting OS/2.
88 %macro SECTION_RODATA 0-1 16
89 %ifidn __OUTPUT_FORMAT__,aout
90 section .text
91 %else
92 SECTION .rodata align=%1
93 %endif
94 %endmacro
95
96 %if WIN64
97 %define PIC
98 %elif ARCH_X86_64 == 0
99 ; x86_32 doesn't require PIC.
100 ; Some distros prefer shared objects to be PIC, but nothing breaks if
101 ; the code contains a few textrels, so we'll skip that complexity.
102 %undef PIC
103 %endif
104 %ifdef PIC
105 default rel
106 %endif
107
108 %macro CPUNOP 1
109 %if HAVE_CPUNOP
110 CPU %1
111 %endif
112 %endmacro
113
114 ; Macros to eliminate most code duplication between x86_32 and x86_64:
115 ; Currently this works only for leaf functions which load all their arguments
116 ; into registers at the start, and make no other use of the stack. Luckily that
117 ; covers most of x264's asm.
118
119 ; PROLOGUE:
120 ; %1 = number of arguments. loads them from stack if needed.
121 ; %2 = number of registers used. pushes callee-saved regs if needed.
122 ; %3 = number of xmm registers used. pushes callee-saved xmm regs if needed.
123 ; %4 = (optional) stack size to be allocated. The stack will be aligned before
124 ; allocating the specified stack size. If the required stack alignment is
125 ; larger than the known stack alignment the stack will be manually aligned
126 ; and an extra register will be allocated to hold the original stack
127 ; pointer (to not invalidate r0m etc.). To prevent the use of an extra
128 ; register as stack pointer, request a negative stack size.
129 ; %4+/%5+ = list of names to define to registers
130 ; PROLOGUE can also be invoked by adding the same options to cglobal
131
132 ; e.g.
133 ; cglobal foo, 2,3,7,0x40, dst, src, tmp
134 ; declares a function (foo) that automatically loads two arguments (dst and
135 ; src) into registers, uses one additional register (tmp) plus 7 vector
136 ; registers (m0-m6) and allocates 0x40 bytes of stack space.
137
138 ; TODO Some functions can use some args directly from the stack. If they're the
139 ; last args then you can just not declare them, but if they're in the middle
140 ; we need more flexible macro.
141
142 ; RET:
143 ; Pops anything that was pushed by PROLOGUE, and returns.
144
145 ; REP_RET:
146 ; Use this instead of RET if it's a branch target.
147
148 ; registers:
149 ; rN and rNq are the native-size register holding function argument N
150 ; rNd, rNw, rNb are dword, word, and byte size
151 ; rNh is the high 8 bits of the word size
152 ; rNm is the original location of arg N (a register or on the stack), dword
153 ; rNmp is native size
154
155 %macro DECLARE_REG 2-3
156 %define r%1q %2
157 %define r%1d %2d
158 %define r%1w %2w
159 %define r%1b %2b
160 %define r%1h %2h
161 %define %2q %2
162 %if %0 == 2
163 %define r%1m %2d
164 %define r%1mp %2
165 %elif ARCH_X86_64 ; memory
166 %define r%1m [rstk + stack_offset + %3]
167 %define r%1mp qword r %+ %1 %+ m
168 %else
169 %define r%1m [rstk + stack_offset + %3]
170 %define r%1mp dword r %+ %1 %+ m
171 %endif
172 %define r%1 %2
173 %endmacro
174
175 %macro DECLARE_REG_SIZE 3
176 %define r%1q r%1
177 %define e%1q r%1
178 %define r%1d e%1
179 %define e%1d e%1
180 %define r%1w %1
181 %define e%1w %1
182 %define r%1h %3
183 %define e%1h %3
184 %define r%1b %2
185 %define e%1b %2
186 %if ARCH_X86_64 == 0
187 %define r%1 e%1
188 %endif
189 %endmacro
190
191 DECLARE_REG_SIZE ax, al, ah
192 DECLARE_REG_SIZE bx, bl, bh
193 DECLARE_REG_SIZE cx, cl, ch
194 DECLARE_REG_SIZE dx, dl, dh
195 DECLARE_REG_SIZE si, sil, null
196 DECLARE_REG_SIZE di, dil, null
197 DECLARE_REG_SIZE bp, bpl, null
198
199 ; t# defines for when per-arch register allocation is more complex than just function arguments
200
201 %macro DECLARE_REG_TMP 1-*
202 %assign %%i 0
203 %rep %0
204 CAT_XDEFINE t, %%i, r%1
205 %assign %%i %%i+1
206 %rotate 1
207 %endrep
208 %endmacro
209
210 %macro DECLARE_REG_TMP_SIZE 0-*
211 %rep %0
212 %define t%1q t%1 %+ q
213 %define t%1d t%1 %+ d
214 %define t%1w t%1 %+ w
215 %define t%1h t%1 %+ h
216 %define t%1b t%1 %+ b
217 %rotate 1
218 %endrep
219 %endmacro
220
221 DECLARE_REG_TMP_SIZE 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14
222
223 %if ARCH_X86_64
224 %define gprsize 8
225 %else
226 %define gprsize 4
227 %endif
228
229 %macro PUSH 1
230 push %1
231 %ifidn rstk, rsp
232 %assign stack_offset stack_offset+gprsize
233 %endif
234 %endmacro
235
236 %macro POP 1
237 pop %1
238 %ifidn rstk, rsp
239 %assign stack_offset stack_offset-gprsize
240 %endif
241 %endmacro
242
243 %macro PUSH_IF_USED 1-*
244 %rep %0
245 %if %1 < regs_used
246 PUSH r%1
247 %endif
248 %rotate 1
249 %endrep
250 %endmacro
251
252 %macro POP_IF_USED 1-*
253 %rep %0
254 %if %1 < regs_used
255 pop r%1
256 %endif
257 %rotate 1
258 %endrep
259 %endmacro
260
261 %macro LOAD_IF_USED 1-*
262 %rep %0
263 %if %1 < num_args
264 mov r%1, r %+ %1 %+ mp
265 %endif
266 %rotate 1
267 %endrep
268 %endmacro
269
270 %macro SUB 2
271 sub %1, %2
272 %ifidn %1, rstk
273 %assign stack_offset stack_offset+(%2)
274 %endif
275 %endmacro
276
277 %macro ADD 2
278 add %1, %2
279 %ifidn %1, rstk
280 %assign stack_offset stack_offset-(%2)
281 %endif
282 %endmacro
283
284 %macro movifnidn 2
285 %ifnidn %1, %2
286 mov %1, %2
287 %endif
288 %endmacro
289
290 %macro movsxdifnidn 2
291 %ifnidn %1, %2
292 movsxd %1, %2
293 %endif
294 %endmacro
295
296 %macro ASSERT 1
297 %if (%1) == 0
298 %error assertion ``%1'' failed
299 %endif
300 %endmacro
301
302 %macro DEFINE_ARGS 0-*
303 %ifdef n_arg_names
304 %assign %%i 0
305 %rep n_arg_names
306 CAT_UNDEF arg_name %+ %%i, q
307 CAT_UNDEF arg_name %+ %%i, d
308 CAT_UNDEF arg_name %+ %%i, w
309 CAT_UNDEF arg_name %+ %%i, h
310 CAT_UNDEF arg_name %+ %%i, b
311 CAT_UNDEF arg_name %+ %%i, m
312 CAT_UNDEF arg_name %+ %%i, mp
313 CAT_UNDEF arg_name, %%i
314 %assign %%i %%i+1
315 %endrep
316 %endif
317
318 %xdefine %%stack_offset stack_offset
319 %undef stack_offset ; so that the current value of stack_offset doesn't get baked in by xdefine
320 %assign %%i 0
321 %rep %0
322 %xdefine %1q r %+ %%i %+ q
323 %xdefine %1d r %+ %%i %+ d
324 %xdefine %1w r %+ %%i %+ w
325 %xdefine %1h r %+ %%i %+ h
326 %xdefine %1b r %+ %%i %+ b
327 %xdefine %1m r %+ %%i %+ m
328 %xdefine %1mp r %+ %%i %+ mp
329 CAT_XDEFINE arg_name, %%i, %1
330 %assign %%i %%i+1
331 %rotate 1
332 %endrep
333 %xdefine stack_offset %%stack_offset
334 %assign n_arg_names %0
335 %endmacro
336
337 %define required_stack_alignment ((mmsize + 15) & ~15)
338
339 %macro ALLOC_STACK 1-2 0 ; stack_size, n_xmm_regs (for win64 only)
340 %ifnum %1
341 %if %1 != 0
342 %assign %%pad 0
343 %assign stack_size %1
344 %if stack_size < 0
345 %assign stack_size -stack_size
346 %endif
347 %if WIN64
348 %assign %%pad %%pad + 32 ; shadow space
349 %if mmsize != 8
350 %assign xmm_regs_used %2
351 %if xmm_regs_used > 8
352 %assign %%pad %%pad + (xmm_regs_used-8)*16 ; callee-saved xmm registers
353 %endif
354 %endif
355 %endif
356 %if required_stack_alignment <= STACK_ALIGNMENT
357 ; maintain the current stack alignment
358 %assign stack_size_padded stack_size + %%pad + ((-%%pad-stack_offset-gprsize) & (STACK_ALIGNMENT-1))
359 SUB rsp, stack_size_padded
360 %else
361 %assign %%reg_num (regs_used - 1)
362 %xdefine rstk r %+ %%reg_num
363 ; align stack, and save original stack location directly above
364 ; it, i.e. in [rsp+stack_size_padded], so we can restore the
365 ; stack in a single instruction (i.e. mov rsp, rstk or mov
366 ; rsp, [rsp+stack_size_padded])
367 %if %1 < 0 ; need to store rsp on stack
368 %xdefine rstkm [rsp + stack_size + %%pad]
369 %assign %%pad %%pad + gprsize
370 %else ; can keep rsp in rstk during whole function
371 %xdefine rstkm rstk
372 %endif
373 %assign stack_size_padded stack_size + ((%%pad + required_stack_alignment-1) & ~(required_stack_alignment-1))
374 mov rstk, rsp
375 and rsp, ~(required_stack_alignment-1)
376 sub rsp, stack_size_padded
377 movifnidn rstkm, rstk
378 %endif
379 WIN64_PUSH_XMM
380 %endif
381 %endif
382 %endmacro
383
384 %macro SETUP_STACK_POINTER 1
385 %ifnum %1
386 %if %1 != 0 && required_stack_alignment > STACK_ALIGNMENT
387 %if %1 > 0
388 %assign regs_used (regs_used + 1)
389 %endif
390 %if ARCH_X86_64 && regs_used < 5 + UNIX64 * 3
391 ; Ensure that we don't clobber any registers containing arguments. For UNIX64 we also preserve r6 (rax)
392 ; since it's used as a hidden argument in vararg functions to specify the number of vector registers used.
393 %assign regs_used 5 + UNIX64 * 3
394 %endif
395 %endif
396 %endif
397 %endmacro
398
399 %macro DEFINE_ARGS_INTERNAL 3+
400 %ifnum %2
401 DEFINE_ARGS %3
402 %elif %1 == 4
403 DEFINE_ARGS %2
404 %elif %1 > 4
405 DEFINE_ARGS %2, %3
406 %endif
407 %endmacro
408
409 %if WIN64 ; Windows x64 ;=================================================
410
411 DECLARE_REG 0, rcx
412 DECLARE_REG 1, rdx
413 DECLARE_REG 2, R8
414 DECLARE_REG 3, R9
415 DECLARE_REG 4, R10, 40
416 DECLARE_REG 5, R11, 48
417 DECLARE_REG 6, rax, 56
418 DECLARE_REG 7, rdi, 64
419 DECLARE_REG 8, rsi, 72
420 DECLARE_REG 9, rbx, 80
421 DECLARE_REG 10, rbp, 88
422 DECLARE_REG 11, R12, 96
423 DECLARE_REG 12, R13, 104
424 DECLARE_REG 13, R14, 112
425 DECLARE_REG 14, R15, 120
426
427 %macro PROLOGUE 2-5+ 0 ; #args, #regs, #xmm_regs, [stack_size,] arg_names...
428 %assign num_args %1
429 %assign regs_used %2
430 ASSERT regs_used >= num_args
431 SETUP_STACK_POINTER %4
432 ASSERT regs_used <= 15
433 PUSH_IF_USED 7, 8, 9, 10, 11, 12, 13, 14
434 ALLOC_STACK %4, %3
435 %if mmsize != 8 && stack_size == 0
436 WIN64_SPILL_XMM %3
437 %endif
438 LOAD_IF_USED 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
439 DEFINE_ARGS_INTERNAL %0, %4, %5
440 %endmacro
441
442 %macro WIN64_PUSH_XMM 0
443 ; Use the shadow space to store XMM6 and XMM7, the rest needs stack space allocated.
444 %if xmm_regs_used > 6
445 movaps [rstk + stack_offset + 8], xmm6
446 %endif
447 %if xmm_regs_used > 7
448 movaps [rstk + stack_offset + 24], xmm7
449 %endif
450 %if xmm_regs_used > 8
451 %assign %%i 8
452 %rep xmm_regs_used-8
453 movaps [rsp + (%%i-8)*16 + stack_size + 32], xmm %+ %%i
454 %assign %%i %%i+1
455 %endrep
456 %endif
457 %endmacro
458
459 %macro WIN64_SPILL_XMM 1
460 %assign xmm_regs_used %1
461 ASSERT xmm_regs_used <= 16
462 %if xmm_regs_used > 8
463 ; Allocate stack space for callee-saved xmm registers plus shadow space and align the stack.
464 %assign %%pad (xmm_regs_used-8)*16 + 32
465 %assign stack_size_padded %%pad + ((-%%pad-stack_offset-gprsize) & (STACK_ALIGNMENT-1))
466 SUB rsp, stack_size_padded
467 %endif
468 WIN64_PUSH_XMM
469 %endmacro
470
471 %macro WIN64_RESTORE_XMM_INTERNAL 1
472 %assign %%pad_size 0
473 %if xmm_regs_used > 8
474 %assign %%i xmm_regs_used
475 %rep xmm_regs_used-8
476 %assign %%i %%i-1
477 movaps xmm %+ %%i, [%1 + (%%i-8)*16 + stack_size + 32]
478 %endrep
479 %endif
480 %if stack_size_padded > 0
481 %if stack_size > 0 && required_stack_alignment > STACK_ALIGNMENT
482 mov rsp, rstkm
483 %else
484 add %1, stack_size_padded
485 %assign %%pad_size stack_size_padded
486 %endif
487 %endif
488 %if xmm_regs_used > 7
489 movaps xmm7, [%1 + stack_offset - %%pad_size + 24]
490 %endif
491 %if xmm_regs_used > 6
492 movaps xmm6, [%1 + stack_offset - %%pad_size + 8]
493 %endif
494 %endmacro
495
496 %macro WIN64_RESTORE_XMM 1
497 WIN64_RESTORE_XMM_INTERNAL %1
498 %assign stack_offset (stack_offset-stack_size_padded)
499 %assign xmm_regs_used 0
500 %endmacro
501
502 %define has_epilogue regs_used > 7 || xmm_regs_used > 6 || mmsize == 32 || stack_size > 0
503
504 %macro RET 0
505 WIN64_RESTORE_XMM_INTERNAL rsp
506 POP_IF_USED 14, 13, 12, 11, 10, 9, 8, 7
507 %if mmsize == 32
508 vzeroupper
509 %endif
510 AUTO_REP_RET
511 %endmacro
512
513 %elif ARCH_X86_64 ; *nix x64 ;=============================================
514
515 DECLARE_REG 0, rdi
516 DECLARE_REG 1, rsi
517 DECLARE_REG 2, rdx
518 DECLARE_REG 3, rcx
519 DECLARE_REG 4, R8
520 DECLARE_REG 5, R9
521 DECLARE_REG 6, rax, 8
522 DECLARE_REG 7, R10, 16
523 DECLARE_REG 8, R11, 24
524 DECLARE_REG 9, rbx, 32
525 DECLARE_REG 10, rbp, 40
526 DECLARE_REG 11, R12, 48
527 DECLARE_REG 12, R13, 56
528 DECLARE_REG 13, R14, 64
529 DECLARE_REG 14, R15, 72
530
531 %macro PROLOGUE 2-5+ ; #args, #regs, #xmm_regs, [stack_size,] arg_names...
532 %assign num_args %1
533 %assign regs_used %2
534 ASSERT regs_used >= num_args
535 SETUP_STACK_POINTER %4
536 ASSERT regs_used <= 15
537 PUSH_IF_USED 9, 10, 11, 12, 13, 14
538 ALLOC_STACK %4
539 LOAD_IF_USED 6, 7, 8, 9, 10, 11, 12, 13, 14
540 DEFINE_ARGS_INTERNAL %0, %4, %5
541 %endmacro
542
543 %define has_epilogue regs_used > 9 || mmsize == 32 || stack_size > 0
544
545 %macro RET 0
546 %if stack_size_padded > 0
547 %if required_stack_alignment > STACK_ALIGNMENT
548 mov rsp, rstkm
549 %else
550 add rsp, stack_size_padded
551 %endif
552 %endif
553 POP_IF_USED 14, 13, 12, 11, 10, 9
554 %if mmsize == 32
555 vzeroupper
556 %endif
557 AUTO_REP_RET
558 %endmacro
559
560 %else ; X86_32 ;==============================================================
561
562 DECLARE_REG 0, eax, 4
563 DECLARE_REG 1, ecx, 8
564 DECLARE_REG 2, edx, 12
565 DECLARE_REG 3, ebx, 16
566 DECLARE_REG 4, esi, 20
567 DECLARE_REG 5, edi, 24
568 DECLARE_REG 6, ebp, 28
569 %define rsp esp
570
571 %macro DECLARE_ARG 1-*
572 %rep %0
573 %define r%1m [rstk + stack_offset + 4*%1 + 4]
574 %define r%1mp dword r%1m
575 %rotate 1
576 %endrep
577 %endmacro
578
579 DECLARE_ARG 7, 8, 9, 10, 11, 12, 13, 14
580
581 %macro PROLOGUE 2-5+ ; #args, #regs, #xmm_regs, [stack_size,] arg_names...
582 %assign num_args %1
583 %assign regs_used %2
584 ASSERT regs_used >= num_args
585 %if num_args > 7
586 %assign num_args 7
587 %endif
588 %if regs_used > 7
589 %assign regs_used 7
590 %endif
591 SETUP_STACK_POINTER %4
592 ASSERT regs_used <= 7
593 PUSH_IF_USED 3, 4, 5, 6
594 ALLOC_STACK %4
595 LOAD_IF_USED 0, 1, 2, 3, 4, 5, 6
596 DEFINE_ARGS_INTERNAL %0, %4, %5
597 %endmacro
598
599 %define has_epilogue regs_used > 3 || mmsize == 32 || stack_size > 0
600
601 %macro RET 0
602 %if stack_size_padded > 0
603 %if required_stack_alignment > STACK_ALIGNMENT
604 mov rsp, rstkm
605 %else
606 add rsp, stack_size_padded
607 %endif
608 %endif
609 POP_IF_USED 6, 5, 4, 3
610 %if mmsize == 32
611 vzeroupper
612 %endif
613 AUTO_REP_RET
614 %endmacro
615
616 %endif ;======================================================================
617
618 %if WIN64 == 0
619 %macro WIN64_SPILL_XMM 1
620 %endmacro
621 %macro WIN64_RESTORE_XMM 1
622 %endmacro
623 %macro WIN64_PUSH_XMM 0
624 %endmacro
625 %endif
626
627 ; On AMD cpus <=K10, an ordinary ret is slow if it immediately follows either
628 ; a branch or a branch target. So switch to a 2-byte form of ret in that case.
629 ; We can automatically detect "follows a branch", but not a branch target.
630 ; (SSSE3 is a sufficient condition to know that your cpu doesn't have this problem.)
631 %macro REP_RET 0
632 %if has_epilogue
633 RET
634 %else
635 rep ret
636 %endif
637 %endmacro
638
639 %define last_branch_adr $$
640 %macro AUTO_REP_RET 0
641 %ifndef cpuflags
642 times ((last_branch_adr-$)>>31)+1 rep ; times 1 iff $ != last_branch_adr.
643 %elif notcpuflag(ssse3)
644 times ((last_branch_adr-$)>>31)+1 rep
645 %endif
646 ret
647 %endmacro
648
649 %macro BRANCH_INSTR 0-*
650 %rep %0
651 %macro %1 1-2 %1
652 %2 %1
653 %%branch_instr:
654 %xdefine last_branch_adr %%branch_instr
655 %endmacro
656 %rotate 1
657 %endrep
658 %endmacro
659
660 BRANCH_INSTR jz, je, jnz, jne, jl, jle, jnl, jnle, jg, jge, jng, jnge, ja, jae, jna, jnae, jb, jbe, jnb, jnbe, jc, jnc, js, jns, jo, jno, jp, jnp
661
662 %macro TAIL_CALL 2 ; callee, is_nonadjacent
663 %if has_epilogue
664 call %1
665 RET
666 %elif %2
667 jmp %1
668 %endif
669 %endmacro
670
671 ;=============================================================================
672 ; arch-independent part
673 ;=============================================================================
674
675 %assign function_align 16
676
677 ; Begin a function.
678 ; Applies any symbol mangling needed for C linkage, and sets up a define such that
679 ; subsequent uses of the function name automatically refer to the mangled version.
680 ; Appends cpuflags to the function name if cpuflags has been specified.
681 ; The "" empty default parameter is a workaround for nasm, which fails if SUFFIX
682 ; is empty and we call cglobal_internal with just %1 %+ SUFFIX (without %2).
683 %macro cglobal 1-2+ "" ; name, [PROLOGUE args]
684 cglobal_internal 1, %1 %+ SUFFIX, %2
685 %endmacro
686 %macro cvisible 1-2+ "" ; name, [PROLOGUE args]
687 cglobal_internal 0, %1 %+ SUFFIX, %2
688 %endmacro
689 %macro cglobal_internal 2-3+
690 %if %1
691 %xdefine %%FUNCTION_PREFIX private_prefix
692 %xdefine %%VISIBILITY hidden
693 %else
694 %xdefine %%FUNCTION_PREFIX public_prefix
695 %xdefine %%VISIBILITY
696 %endif
697 %ifndef cglobaled_%2
698 %xdefine %2 mangle(%%FUNCTION_PREFIX %+ _ %+ %2)
699 %xdefine %2.skip_prologue %2 %+ .skip_prologue
700 CAT_XDEFINE cglobaled_, %2, 1
701 %endif
702 %xdefine current_function %2
703 %if FORMAT_ELF
704 global %2:function %%VISIBILITY
705 %else
706 global %2
707 %endif
708 align function_align
709 %2:
710 RESET_MM_PERMUTATION ; needed for x86-64, also makes disassembly somewhat nicer
711 %xdefine rstk rsp ; copy of the original stack pointer, used when greater alignment than the known stack alignment is required
712 %assign stack_offset 0 ; stack pointer offset relative to the return address
713 %assign stack_size 0 ; amount of stack space that can be freely used inside a function
714 %assign stack_size_padded 0 ; total amount of allocated stack space, including space for callee-saved xmm registers on WIN64 and alignment padding
715 %assign xmm_regs_used 0 ; number of XMM registers requested, used for dealing with callee-saved registers on WIN64
716 %ifnidn %3, ""
717 PROLOGUE %3
718 %endif
719 %endmacro
720
721 %macro cextern 1
722 %xdefine %1 mangle(private_prefix %+ _ %+ %1)
723 CAT_XDEFINE cglobaled_, %1, 1
724 extern %1
725 %endmacro
726
727 ; like cextern, but without the prefix
728 %macro cextern_naked 1
729 %ifdef PREFIX
730 %xdefine %1 mangle(%1)
731 %endif
732 CAT_XDEFINE cglobaled_, %1, 1
733 extern %1
734 %endmacro
735
736 %macro const 1-2+
737 %xdefine %1 mangle(private_prefix %+ _ %+ %1)
738 %if FORMAT_ELF
739 global %1:data hidden
740 %else
741 global %1
742 %endif
743 %1: %2
744 %endmacro
745
746 ; This is needed for ELF, otherwise the GNU linker assumes the stack is executable by default.
747 %if FORMAT_ELF
748 [SECTION .note.GNU-stack noalloc noexec nowrite progbits]
749 %endif
750
751 ; cpuflags
752
753 %assign cpuflags_mmx (1<<0)
754 %assign cpuflags_mmx2 (1<<1) | cpuflags_mmx
755 %assign cpuflags_3dnow (1<<2) | cpuflags_mmx
756 %assign cpuflags_3dnowext (1<<3) | cpuflags_3dnow
757 %assign cpuflags_sse (1<<4) | cpuflags_mmx2
758 %assign cpuflags_sse2 (1<<5) | cpuflags_sse
759 %assign cpuflags_sse2slow (1<<6) | cpuflags_sse2
760 %assign cpuflags_sse3 (1<<7) | cpuflags_sse2
761 %assign cpuflags_ssse3 (1<<8) | cpuflags_sse3
762 %assign cpuflags_sse4 (1<<9) | cpuflags_ssse3
763 %assign cpuflags_sse42 (1<<10)| cpuflags_sse4
764 %assign cpuflags_avx (1<<11)| cpuflags_sse42
765 %assign cpuflags_xop (1<<12)| cpuflags_avx
766 %assign cpuflags_fma4 (1<<13)| cpuflags_avx
767 %assign cpuflags_fma3 (1<<14)| cpuflags_avx
768 %assign cpuflags_avx2 (1<<15)| cpuflags_fma3
769
770 %assign cpuflags_cache32 (1<<16)
771 %assign cpuflags_cache64 (1<<17)
772 %assign cpuflags_slowctz (1<<18)
773 %assign cpuflags_lzcnt (1<<19)
774 %assign cpuflags_aligned (1<<20) ; not a cpu feature, but a function variant
775 %assign cpuflags_atom (1<<21)
776 %assign cpuflags_bmi1 (1<<22)|cpuflags_lzcnt
777 %assign cpuflags_bmi2 (1<<23)|cpuflags_bmi1
778
779 ; Returns a boolean value expressing whether or not the specified cpuflag is enabled.
780 %define cpuflag(x) (((((cpuflags & (cpuflags_ %+ x)) ^ (cpuflags_ %+ x)) - 1) >> 31) & 1)
781 %define notcpuflag(x) (cpuflag(x) ^ 1)
782
783 ; Takes an arbitrary number of cpuflags from the above list.
784 ; All subsequent functions (up to the next INIT_CPUFLAGS) is built for the specified cpu.
785 ; You shouldn't need to invoke this macro directly, it's a subroutine for INIT_MMX &co.
786 %macro INIT_CPUFLAGS 0-*
787 %xdefine SUFFIX
788 %undef cpuname
789 %assign cpuflags 0
790
791 %if %0 >= 1
792 %rep %0
793 %ifdef cpuname
794 %xdefine cpuname cpuname %+ _%1
795 %else
796 %xdefine cpuname %1
797 %endif
798 %assign cpuflags cpuflags | cpuflags_%1
799 %rotate 1
800 %endrep
801 %xdefine SUFFIX _ %+ cpuname
802
803 %if cpuflag(avx)
804 %assign avx_enabled 1
805 %endif
806 %if (mmsize == 16 && notcpuflag(sse2)) || (mmsize == 32 && notcpuflag(avx2))
807 %define mova movaps
808 %define movu movups
809 %define movnta movntps
810 %endif
811 %if cpuflag(aligned)
812 %define movu mova
813 %elif cpuflag(sse3) && notcpuflag(ssse3)
814 %define movu lddqu
815 %endif
816 %endif
817
818 %if ARCH_X86_64 || cpuflag(sse2)
819 CPUNOP amdnop
820 %else
821 CPUNOP basicnop
822 %endif
823 %endmacro
824
825 ; Merge mmx and sse*
826 ; m# is a simd register of the currently selected size
827 ; xm# is the corresponding xmm register if mmsize >= 16, otherwise the same as m#
828 ; ym# is the corresponding ymm register if mmsize >= 32, otherwise the same as m#
829 ; (All 3 remain in sync through SWAP.)
830
831 %macro CAT_XDEFINE 3
832 %xdefine %1%2 %3
833 %endmacro
834
835 %macro CAT_UNDEF 2
836 %undef %1%2
837 %endmacro
838
839 %macro INIT_MMX 0-1+
840 %assign avx_enabled 0
841 %define RESET_MM_PERMUTATION INIT_MMX %1
842 %define mmsize 8
843 %define num_mmregs 8
844 %define mova movq
845 %define movu movq
846 %define movh movd
847 %define movnta movntq
848 %assign %%i 0
849 %rep 8
850 CAT_XDEFINE m, %%i, mm %+ %%i
851 CAT_XDEFINE nnmm, %%i, %%i
852 %assign %%i %%i+1
853 %endrep
854 %rep 8
855 CAT_UNDEF m, %%i
856 CAT_UNDEF nnmm, %%i
857 %assign %%i %%i+1
858 %endrep
859 INIT_CPUFLAGS %1
860 %endmacro
861
862 %macro INIT_XMM 0-1+
863 %assign avx_enabled 0
864 %define RESET_MM_PERMUTATION INIT_XMM %1
865 %define mmsize 16
866 %define num_mmregs 8
867 %if ARCH_X86_64
868 %define num_mmregs 16
869 %endif
870 %define mova movdqa
871 %define movu movdqu
872 %define movh movq
873 %define movnta movntdq
874 %assign %%i 0
875 %rep num_mmregs
876 CAT_XDEFINE m, %%i, xmm %+ %%i
877 CAT_XDEFINE nnxmm, %%i, %%i
878 %assign %%i %%i+1
879 %endrep
880 INIT_CPUFLAGS %1
881 %endmacro
882
883 %macro INIT_YMM 0-1+
884 %assign avx_enabled 1
885 %define RESET_MM_PERMUTATION INIT_YMM %1
886 %define mmsize 32
887 %define num_mmregs 8
888 %if ARCH_X86_64
889 %define num_mmregs 16
890 %endif
891 %define mova movdqa
892 %define movu movdqu
893 %undef movh
894 %define movnta movntdq
895 %assign %%i 0
896 %rep num_mmregs
897 CAT_XDEFINE m, %%i, ymm %+ %%i
898 CAT_XDEFINE nnymm, %%i, %%i
899 %assign %%i %%i+1
900 %endrep
901 INIT_CPUFLAGS %1
902 %endmacro
903
904 INIT_XMM
905
906 %macro DECLARE_MMCAST 1
907 %define mmmm%1 mm%1
908 %define mmxmm%1 mm%1
909 %define mmymm%1 mm%1
910 %define xmmmm%1 mm%1
911 %define xmmxmm%1 xmm%1
912 %define xmmymm%1 xmm%1
913 %define ymmmm%1 mm%1
914 %define ymmxmm%1 xmm%1
915 %define ymmymm%1 ymm%1
916 %define xm%1 xmm %+ m%1
917 %define ym%1 ymm %+ m%1
918 %endmacro
919
920 %assign i 0
921 %rep 16
922 DECLARE_MMCAST i
923 %assign i i+1
924 %endrep
925
926 ; I often want to use macros that permute their arguments. e.g. there's no
927 ; efficient way to implement butterfly or transpose or dct without swapping some
928 ; arguments.
929 ;
930 ; I would like to not have to manually keep track of the permutations:
931 ; If I insert a permutation in the middle of a function, it should automatically
932 ; change everything that follows. For more complex macros I may also have multiple
933 ; implementations, e.g. the SSE2 and SSSE3 versions may have different permutations.
934 ;
935 ; Hence these macros. Insert a PERMUTE or some SWAPs at the end of a macro that
936 ; permutes its arguments. It's equivalent to exchanging the contents of the
937 ; registers, except that this way you exchange the register names instead, so it
938 ; doesn't cost any cycles.
939
940 %macro PERMUTE 2-* ; takes a list of pairs to swap
941 %rep %0/2
942 %xdefine %%tmp%2 m%2
943 %rotate 2
944 %endrep
945 %rep %0/2
946 %xdefine m%1 %%tmp%2
947 CAT_XDEFINE nn, m%1, %1
948 %rotate 2
949 %endrep
950 %endmacro
951
952 %macro SWAP 2+ ; swaps a single chain (sometimes more concise than pairs)
953 %ifnum %1 ; SWAP 0, 1, ...
954 SWAP_INTERNAL_NUM %1, %2
955 %else ; SWAP m0, m1, ...
956 SWAP_INTERNAL_NAME %1, %2
957 %endif
958 %endmacro
959
960 %macro SWAP_INTERNAL_NUM 2-*
961 %rep %0-1
962 %xdefine %%tmp m%1
963 %xdefine m%1 m%2
964 %xdefine m%2 %%tmp
965 CAT_XDEFINE nn, m%1, %1
966 CAT_XDEFINE nn, m%2, %2
967 %rotate 1
968 %endrep
969 %endmacro
970
971 %macro SWAP_INTERNAL_NAME 2-*
972 %xdefine %%args nn %+ %1
973 %rep %0-1
974 %xdefine %%args %%args, nn %+ %2
975 %rotate 1
976 %endrep
977 SWAP_INTERNAL_NUM %%args
978 %endmacro
979
980 ; If SAVE_MM_PERMUTATION is placed at the end of a function, then any later
981 ; calls to that function will automatically load the permutation, so values can
982 ; be returned in mmregs.
983 %macro SAVE_MM_PERMUTATION 0-1
984 %if %0
985 %xdefine %%f %1_m
986 %else
987 %xdefine %%f current_function %+ _m
988 %endif
989 %assign %%i 0
990 %rep num_mmregs
991 CAT_XDEFINE %%f, %%i, m %+ %%i
992 %assign %%i %%i+1
993 %endrep
994 %endmacro
995
996 %macro LOAD_MM_PERMUTATION 1 ; name to load from
997 %ifdef %1_m0
998 %assign %%i 0
999 %rep num_mmregs
1000 CAT_XDEFINE m, %%i, %1_m %+ %%i
1001 CAT_XDEFINE nn, m %+ %%i, %%i
1002 %assign %%i %%i+1
1003 %endrep
1004 %endif
1005 %endmacro
1006
1007 ; Append cpuflags to the callee's name iff the appended name is known and the plain name isn't
1008 %macro call 1
1009 call_internal %1 %+ SUFFIX, %1
1010 %endmacro
1011 %macro call_internal 2
1012 %xdefine %%i %2
1013 %ifndef cglobaled_%2
1014 %ifdef cglobaled_%1
1015 %xdefine %%i %1
1016 %endif
1017 %endif
1018 call %%i
1019 LOAD_MM_PERMUTATION %%i
1020 %endmacro
1021
1022 ; Substitutions that reduce instruction size but are functionally equivalent
1023 %macro add 2
1024 %ifnum %2
1025 %if %2==128
1026 sub %1, -128
1027 %else
1028 add %1, %2
1029 %endif
1030 %else
1031 add %1, %2
1032 %endif
1033 %endmacro
1034
1035 %macro sub 2
1036 %ifnum %2
1037 %if %2==128
1038 add %1, -128
1039 %else
1040 sub %1, %2
1041 %endif
1042 %else
1043 sub %1, %2
1044 %endif
1045 %endmacro
1046
1047 ;=============================================================================
1048 ; AVX abstraction layer
1049 ;=============================================================================
1050
1051 %assign i 0
1052 %rep 16
1053 %if i < 8
1054 CAT_XDEFINE sizeofmm, i, 8
1055 %endif
1056 CAT_XDEFINE sizeofxmm, i, 16
1057 CAT_XDEFINE sizeofymm, i, 32
1058 %assign i i+1
1059 %endrep
1060 %undef i
1061
1062 %macro CHECK_AVX_INSTR_EMU 3-*
1063 %xdefine %%opcode %1
1064 %xdefine %%dst %2
1065 %rep %0-2
1066 %ifidn %%dst, %3
1067 %error non-avx emulation of ``%%opcode'' is not supported
1068 %endif
1069 %rotate 1
1070 %endrep
1071 %endmacro
1072
1073 ;%1 == instruction
1074 ;%2 == minimal instruction set
1075 ;%3 == 1 if float, 0 if int
1076 ;%4 == 1 if non-destructive or 4-operand (xmm, xmm, xmm, imm), 0 otherwise
1077 ;%5 == 1 if commutative (i.e. doesn't matter which src arg is which), 0 if not
1078 ;%6+: operands
1079 %macro RUN_AVX_INSTR 6-9+
1080 %ifnum sizeof%7
1081 %assign __sizeofreg sizeof%7
1082 %elifnum sizeof%6
1083 %assign __sizeofreg sizeof%6
1084 %else
1085 %assign __sizeofreg mmsize
1086 %endif
1087 %assign __emulate_avx 0
1088 %if avx_enabled && __sizeofreg >= 16
1089 %xdefine __instr v%1
1090 %else
1091 %xdefine __instr %1
1092 %if %0 >= 8+%4
1093 %assign __emulate_avx 1
1094 %endif
1095 %endif
1096 %ifnidn %2, fnord
1097 %ifdef cpuname
1098 %if notcpuflag(%2)
1099 %error use of ``%1'' %2 instruction in cpuname function: current_function
1100 %elif cpuflags_%2 < cpuflags_sse && notcpuflag(sse2) && __sizeofreg > 8
1101 %error use of ``%1'' sse2 instruction in cpuname function: current_function
1102 %endif
1103 %endif
1104 %endif
1105
1106 %if __emulate_avx
1107 %xdefine __src1 %7
1108 %xdefine __src2 %8
1109 %ifnidn %6, %7
1110 %if %0 >= 9
1111 CHECK_AVX_INSTR_EMU {%1 %6, %7, %8, %9}, %6, %8, %9
1112 %else
1113 CHECK_AVX_INSTR_EMU {%1 %6, %7, %8}, %6, %8
1114 %endif
1115 %if %5 && %4 == 0
1116 %ifnid %8
1117 ; 3-operand AVX instructions with a memory arg can only have it in src2,
1118 ; whereas SSE emulation prefers to have it in src1 (i.e. the mov).
1119 ; So, if the instruction is commutative with a memory arg, swap them.
1120 %xdefine __src1 %8
1121 %xdefine __src2 %7
1122 %endif
1123 %endif
1124 %if __sizeofreg == 8
1125 MOVQ %6, __src1
1126 %elif %3
1127 MOVAPS %6, __src1
1128 %else
1129 MOVDQA %6, __src1
1130 %endif
1131 %endif
1132 %if %0 >= 9
1133 %1 %6, __src2, %9
1134 %else
1135 %1 %6, __src2
1136 %endif
1137 %elif %0 >= 9
1138 __instr %6, %7, %8, %9
1139 %elif %0 == 8
1140 __instr %6, %7, %8
1141 %elif %0 == 7
1142 __instr %6, %7
1143 %else
1144 __instr %6
1145 %endif
1146 %endmacro
1147
1148 ;%1 == instruction
1149 ;%2 == minimal instruction set
1150 ;%3 == 1 if float, 0 if int
1151 ;%4 == 1 if non-destructive or 4-operand (xmm, xmm, xmm, imm), 0 otherwise
1152 ;%5 == 1 if commutative (i.e. doesn't matter which src arg is which), 0 if not
1153 %macro AVX_INSTR 1-5 fnord, 0, 1, 0
1154 %macro %1 1-10 fnord, fnord, fnord, fnord, %1, %2, %3, %4, %5
1155 %ifidn %2, fnord
1156 RUN_AVX_INSTR %6, %7, %8, %9, %10, %1
1157 %elifidn %3, fnord
1158 RUN_AVX_INSTR %6, %7, %8, %9, %10, %1, %2
1159 %elifidn %4, fnord
1160 RUN_AVX_INSTR %6, %7, %8, %9, %10, %1, %2, %3
1161 %elifidn %5, fnord
1162 RUN_AVX_INSTR %6, %7, %8, %9, %10, %1, %2, %3, %4
1163 %else
1164 RUN_AVX_INSTR %6, %7, %8, %9, %10, %1, %2, %3, %4, %5
1165 %endif
1166 %endmacro
1167 %endmacro
1168
1169 ; Instructions with both VEX and non-VEX encodings
1170 ; Non-destructive instructions are written without parameters
1171 AVX_INSTR addpd, sse2, 1, 0, 1
1172 AVX_INSTR addps, sse, 1, 0, 1
1173 AVX_INSTR addsd, sse2, 1, 0, 1
1174 AVX_INSTR addss, sse, 1, 0, 1
1175 AVX_INSTR addsubpd, sse3, 1, 0, 0
1176 AVX_INSTR addsubps, sse3, 1, 0, 0
1177 AVX_INSTR aesdec, fnord, 0, 0, 0
1178 AVX_INSTR aesdeclast, fnord, 0, 0, 0
1179 AVX_INSTR aesenc, fnord, 0, 0, 0
1180 AVX_INSTR aesenclast, fnord, 0, 0, 0
1181 AVX_INSTR aesimc
1182 AVX_INSTR aeskeygenassist
1183 AVX_INSTR andnpd, sse2, 1, 0, 0
1184 AVX_INSTR andnps, sse, 1, 0, 0
1185 AVX_INSTR andpd, sse2, 1, 0, 1
1186 AVX_INSTR andps, sse, 1, 0, 1
1187 AVX_INSTR blendpd, sse4, 1, 0, 0
1188 AVX_INSTR blendps, sse4, 1, 0, 0
1189 AVX_INSTR blendvpd, sse4, 1, 0, 0
1190 AVX_INSTR blendvps, sse4, 1, 0, 0
1191 AVX_INSTR cmppd, sse2, 1, 1, 0
1192 AVX_INSTR cmpps, sse, 1, 1, 0
1193 AVX_INSTR cmpsd, sse2, 1, 1, 0
1194 AVX_INSTR cmpss, sse, 1, 1, 0
1195 AVX_INSTR comisd, sse2
1196 AVX_INSTR comiss, sse
1197 AVX_INSTR cvtdq2pd, sse2
1198 AVX_INSTR cvtdq2ps, sse2
1199 AVX_INSTR cvtpd2dq, sse2
1200 AVX_INSTR cvtpd2ps, sse2
1201 AVX_INSTR cvtps2dq, sse2
1202 AVX_INSTR cvtps2pd, sse2
1203 AVX_INSTR cvtsd2si, sse2
1204 AVX_INSTR cvtsd2ss, sse2
1205 AVX_INSTR cvtsi2sd, sse2
1206 AVX_INSTR cvtsi2ss, sse
1207 AVX_INSTR cvtss2sd, sse2
1208 AVX_INSTR cvtss2si, sse
1209 AVX_INSTR cvttpd2dq, sse2
1210 AVX_INSTR cvttps2dq, sse2
1211 AVX_INSTR cvttsd2si, sse2
1212 AVX_INSTR cvttss2si, sse
1213 AVX_INSTR divpd, sse2, 1, 0, 0
1214 AVX_INSTR divps, sse, 1, 0, 0
1215 AVX_INSTR divsd, sse2, 1, 0, 0
1216 AVX_INSTR divss, sse, 1, 0, 0
1217 AVX_INSTR dppd, sse4, 1, 1, 0
1218 AVX_INSTR dpps, sse4, 1, 1, 0
1219 AVX_INSTR extractps, sse4
1220 AVX_INSTR haddpd, sse3, 1, 0, 0
1221 AVX_INSTR haddps, sse3, 1, 0, 0
1222 AVX_INSTR hsubpd, sse3, 1, 0, 0
1223 AVX_INSTR hsubps, sse3, 1, 0, 0
1224 AVX_INSTR insertps, sse4, 1, 1, 0
1225 AVX_INSTR lddqu, sse3
1226 AVX_INSTR ldmxcsr, sse
1227 AVX_INSTR maskmovdqu, sse2
1228 AVX_INSTR maxpd, sse2, 1, 0, 1
1229 AVX_INSTR maxps, sse, 1, 0, 1
1230 AVX_INSTR maxsd, sse2, 1, 0, 1
1231 AVX_INSTR maxss, sse, 1, 0, 1
1232 AVX_INSTR minpd, sse2, 1, 0, 1
1233 AVX_INSTR minps, sse, 1, 0, 1
1234 AVX_INSTR minsd, sse2, 1, 0, 1
1235 AVX_INSTR minss, sse, 1, 0, 1
1236 AVX_INSTR movapd, sse2
1237 AVX_INSTR movaps, sse
1238 AVX_INSTR movd, mmx
1239 AVX_INSTR movddup, sse3
1240 AVX_INSTR movdqa, sse2
1241 AVX_INSTR movdqu, sse2
1242 AVX_INSTR movhlps, sse, 1, 0, 0
1243 AVX_INSTR movhpd, sse2, 1, 0, 0
1244 AVX_INSTR movhps, sse, 1, 0, 0
1245 AVX_INSTR movlhps, sse, 1, 0, 0
1246 AVX_INSTR movlpd, sse2, 1, 0, 0
1247 AVX_INSTR movlps, sse, 1, 0, 0
1248 AVX_INSTR movmskpd, sse2
1249 AVX_INSTR movmskps, sse
1250 AVX_INSTR movntdq, sse2
1251 AVX_INSTR movntdqa, sse4
1252 AVX_INSTR movntpd, sse2
1253 AVX_INSTR movntps, sse
1254 AVX_INSTR movq, mmx
1255 AVX_INSTR movsd, sse2, 1, 0, 0
1256 AVX_INSTR movshdup, sse3
1257 AVX_INSTR movsldup, sse3
1258 AVX_INSTR movss, sse, 1, 0, 0
1259 AVX_INSTR movupd, sse2
1260 AVX_INSTR movups, sse
1261 AVX_INSTR mpsadbw, sse4
1262 AVX_INSTR mulpd, sse2, 1, 0, 1
1263 AVX_INSTR mulps, sse, 1, 0, 1
1264 AVX_INSTR mulsd, sse2, 1, 0, 1
1265 AVX_INSTR mulss, sse, 1, 0, 1
1266 AVX_INSTR orpd, sse2, 1, 0, 1
1267 AVX_INSTR orps, sse, 1, 0, 1
1268 AVX_INSTR pabsb, ssse3
1269 AVX_INSTR pabsd, ssse3
1270 AVX_INSTR pabsw, ssse3
1271 AVX_INSTR packsswb, mmx, 0, 0, 0
1272 AVX_INSTR packssdw, mmx, 0, 0, 0
1273 AVX_INSTR packuswb, mmx, 0, 0, 0
1274 AVX_INSTR packusdw, sse4, 0, 0, 0
1275 AVX_INSTR paddb, mmx, 0, 0, 1
1276 AVX_INSTR paddw, mmx, 0, 0, 1
1277 AVX_INSTR paddd, mmx, 0, 0, 1
1278 AVX_INSTR paddq, sse2, 0, 0, 1
1279 AVX_INSTR paddsb, mmx, 0, 0, 1
1280 AVX_INSTR paddsw, mmx, 0, 0, 1
1281 AVX_INSTR paddusb, mmx, 0, 0, 1
1282 AVX_INSTR paddusw, mmx, 0, 0, 1
1283 AVX_INSTR palignr, ssse3
1284 AVX_INSTR pand, mmx, 0, 0, 1
1285 AVX_INSTR pandn, mmx, 0, 0, 0
1286 AVX_INSTR pavgb, mmx2, 0, 0, 1
1287 AVX_INSTR pavgw, mmx2, 0, 0, 1
1288 AVX_INSTR pblendvb, sse4, 0, 0, 0
1289 AVX_INSTR pblendw, sse4
1290 AVX_INSTR pclmulqdq
1291 AVX_INSTR pcmpestri, sse42
1292 AVX_INSTR pcmpestrm, sse42
1293 AVX_INSTR pcmpistri, sse42
1294 AVX_INSTR pcmpistrm, sse42
1295 AVX_INSTR pcmpeqb, mmx, 0, 0, 1
1296 AVX_INSTR pcmpeqw, mmx, 0, 0, 1
1297 AVX_INSTR pcmpeqd, mmx, 0, 0, 1
1298 AVX_INSTR pcmpeqq, sse4, 0, 0, 1
1299 AVX_INSTR pcmpgtb, mmx, 0, 0, 0
1300 AVX_INSTR pcmpgtw, mmx, 0, 0, 0
1301 AVX_INSTR pcmpgtd, mmx, 0, 0, 0
1302 AVX_INSTR pcmpgtq, sse42, 0, 0, 0
1303 AVX_INSTR pextrb, sse4
1304 AVX_INSTR pextrd, sse4
1305 AVX_INSTR pextrq, sse4
1306 AVX_INSTR pextrw, mmx2
1307 AVX_INSTR phaddw, ssse3, 0, 0, 0
1308 AVX_INSTR phaddd, ssse3, 0, 0, 0
1309 AVX_INSTR phaddsw, ssse3, 0, 0, 0
1310 AVX_INSTR phminposuw, sse4
1311 AVX_INSTR phsubw, ssse3, 0, 0, 0
1312 AVX_INSTR phsubd, ssse3, 0, 0, 0
1313 AVX_INSTR phsubsw, ssse3, 0, 0, 0
1314 AVX_INSTR pinsrb, sse4
1315 AVX_INSTR pinsrd, sse4
1316 AVX_INSTR pinsrq, sse4
1317 AVX_INSTR pinsrw, mmx2
1318 AVX_INSTR pmaddwd, mmx, 0, 0, 1
1319 AVX_INSTR pmaddubsw, ssse3, 0, 0, 0
1320 AVX_INSTR pmaxsb, sse4, 0, 0, 1
1321 AVX_INSTR pmaxsw, mmx2, 0, 0, 1
1322 AVX_INSTR pmaxsd, sse4, 0, 0, 1
1323 AVX_INSTR pmaxub, mmx2, 0, 0, 1
1324 AVX_INSTR pmaxuw, sse4, 0, 0, 1
1325 AVX_INSTR pmaxud, sse4, 0, 0, 1
1326 AVX_INSTR pminsb, sse4, 0, 0, 1
1327 AVX_INSTR pminsw, mmx2, 0, 0, 1
1328 AVX_INSTR pminsd, sse4, 0, 0, 1
1329 AVX_INSTR pminub, mmx2, 0, 0, 1
1330 AVX_INSTR pminuw, sse4, 0, 0, 1
1331 AVX_INSTR pminud, sse4, 0, 0, 1
1332 AVX_INSTR pmovmskb, mmx2
1333 AVX_INSTR pmovsxbw, sse4
1334 AVX_INSTR pmovsxbd, sse4
1335 AVX_INSTR pmovsxbq, sse4
1336 AVX_INSTR pmovsxwd, sse4
1337 AVX_INSTR pmovsxwq, sse4
1338 AVX_INSTR pmovsxdq, sse4
1339 AVX_INSTR pmovzxbw, sse4
1340 AVX_INSTR pmovzxbd, sse4
1341 AVX_INSTR pmovzxbq, sse4
1342 AVX_INSTR pmovzxwd, sse4
1343 AVX_INSTR pmovzxwq, sse4
1344 AVX_INSTR pmovzxdq, sse4
1345 AVX_INSTR pmuldq, sse4, 0, 0, 1
1346 AVX_INSTR pmulhrsw, ssse3, 0, 0, 1
1347 AVX_INSTR pmulhuw, mmx2, 0, 0, 1
1348 AVX_INSTR pmulhw, mmx, 0, 0, 1
1349 AVX_INSTR pmullw, mmx, 0, 0, 1
1350 AVX_INSTR pmulld, sse4, 0, 0, 1
1351 AVX_INSTR pmuludq, sse2, 0, 0, 1
1352 AVX_INSTR por, mmx, 0, 0, 1
1353 AVX_INSTR psadbw, mmx2, 0, 0, 1
1354 AVX_INSTR pshufb, ssse3, 0, 0, 0
1355 AVX_INSTR pshufd, sse2
1356 AVX_INSTR pshufhw, sse2
1357 AVX_INSTR pshuflw, sse2
1358 AVX_INSTR psignb, ssse3, 0, 0, 0
1359 AVX_INSTR psignw, ssse3, 0, 0, 0
1360 AVX_INSTR psignd, ssse3, 0, 0, 0
1361 AVX_INSTR psllw, mmx, 0, 0, 0
1362 AVX_INSTR pslld, mmx, 0, 0, 0
1363 AVX_INSTR psllq, mmx, 0, 0, 0
1364 AVX_INSTR pslldq, sse2, 0, 0, 0
1365 AVX_INSTR psraw, mmx, 0, 0, 0
1366 AVX_INSTR psrad, mmx, 0, 0, 0
1367 AVX_INSTR psrlw, mmx, 0, 0, 0
1368 AVX_INSTR psrld, mmx, 0, 0, 0
1369 AVX_INSTR psrlq, mmx, 0, 0, 0
1370 AVX_INSTR psrldq, sse2, 0, 0, 0
1371 AVX_INSTR psubb, mmx, 0, 0, 0
1372 AVX_INSTR psubw, mmx, 0, 0, 0
1373 AVX_INSTR psubd, mmx, 0, 0, 0
1374 AVX_INSTR psubq, sse2, 0, 0, 0
1375 AVX_INSTR psubsb, mmx, 0, 0, 0
1376 AVX_INSTR psubsw, mmx, 0, 0, 0
1377 AVX_INSTR psubusb, mmx, 0, 0, 0
1378 AVX_INSTR psubusw, mmx, 0, 0, 0
1379 AVX_INSTR ptest, sse4
1380 AVX_INSTR punpckhbw, mmx, 0, 0, 0
1381 AVX_INSTR punpckhwd, mmx, 0, 0, 0
1382 AVX_INSTR punpckhdq, mmx, 0, 0, 0
1383 AVX_INSTR punpckhqdq, sse2, 0, 0, 0
1384 AVX_INSTR punpcklbw, mmx, 0, 0, 0
1385 AVX_INSTR punpcklwd, mmx, 0, 0, 0
1386 AVX_INSTR punpckldq, mmx, 0, 0, 0
1387 AVX_INSTR punpcklqdq, sse2, 0, 0, 0
1388 AVX_INSTR pxor, mmx, 0, 0, 1
1389 AVX_INSTR rcpps, sse, 1, 0, 0
1390 AVX_INSTR rcpss, sse, 1, 0, 0
1391 AVX_INSTR roundpd, sse4
1392 AVX_INSTR roundps, sse4
1393 AVX_INSTR roundsd, sse4
1394 AVX_INSTR roundss, sse4
1395 AVX_INSTR rsqrtps, sse, 1, 0, 0
1396 AVX_INSTR rsqrtss, sse, 1, 0, 0
1397 AVX_INSTR shufpd, sse2, 1, 1, 0
1398 AVX_INSTR shufps, sse, 1, 1, 0
1399 AVX_INSTR sqrtpd, sse2, 1, 0, 0
1400 AVX_INSTR sqrtps, sse, 1, 0, 0
1401 AVX_INSTR sqrtsd, sse2, 1, 0, 0
1402 AVX_INSTR sqrtss, sse, 1, 0, 0
1403 AVX_INSTR stmxcsr, sse
1404 AVX_INSTR subpd, sse2, 1, 0, 0
1405 AVX_INSTR subps, sse, 1, 0, 0
1406 AVX_INSTR subsd, sse2, 1, 0, 0
1407 AVX_INSTR subss, sse, 1, 0, 0
1408 AVX_INSTR ucomisd, sse2
1409 AVX_INSTR ucomiss, sse
1410 AVX_INSTR unpckhpd, sse2, 1, 0, 0
1411 AVX_INSTR unpckhps, sse, 1, 0, 0
1412 AVX_INSTR unpcklpd, sse2, 1, 0, 0
1413 AVX_INSTR unpcklps, sse, 1, 0, 0
1414 AVX_INSTR xorpd, sse2, 1, 0, 1
1415 AVX_INSTR xorps, sse, 1, 0, 1
1416
1417 ; 3DNow instructions, for sharing code between AVX, SSE and 3DN
1418 AVX_INSTR pfadd, 3dnow, 1, 0, 1
1419 AVX_INSTR pfsub, 3dnow, 1, 0, 0
1420 AVX_INSTR pfmul, 3dnow, 1, 0, 1
1421
1422 ; base-4 constants for shuffles
1423 %assign i 0
1424 %rep 256
1425 %assign j ((i>>6)&3)*1000 + ((i>>4)&3)*100 + ((i>>2)&3)*10 + (i&3)
1426 %if j < 10
1427 CAT_XDEFINE q000, j, i
1428 %elif j < 100
1429 CAT_XDEFINE q00, j, i
1430 %elif j < 1000
1431 CAT_XDEFINE q0, j, i
1432 %else
1433 CAT_XDEFINE q, j, i
1434 %endif
1435 %assign i i+1
1436 %endrep
1437 %undef i
1438 %undef j
1439
1440 %macro FMA_INSTR 3
1441 %macro %1 4-7 %1, %2, %3
1442 %if cpuflag(xop)
1443 v%5 %1, %2, %3, %4
1444 %elifnidn %1, %4
1445 %6 %1, %2, %3
1446 %7 %1, %4
1447 %else
1448 %error non-xop emulation of ``%5 %1, %2, %3, %4'' is not supported
1449 %endif
1450 %endmacro
1451 %endmacro
1452
1453 FMA_INSTR pmacsww, pmullw, paddw
1454 FMA_INSTR pmacsdd, pmulld, paddd ; sse4 emulation
1455 FMA_INSTR pmacsdql, pmuldq, paddq ; sse4 emulation
1456 FMA_INSTR pmadcswd, pmaddwd, paddd
1457
1458 ; tzcnt is equivalent to "rep bsf" and is backwards-compatible with bsf.
1459 ; This lets us use tzcnt without bumping the yasm version requirement yet.
1460 %define tzcnt rep bsf
1461
1462 ; Macros for consolidating FMA3 and FMA4 using 4-operand (dst, src1, src2, src3) syntax.
1463 ; FMA3 is only possible if dst is the same as one of the src registers.
1464 ; Either src2 or src3 can be a memory operand.
1465 %macro FMA4_INSTR 2-*
1466 %push fma4_instr
1467 %xdefine %$prefix %1
1468 %rep %0 - 1
1469 %macro %$prefix%2 4-6 %$prefix, %2
1470 %if notcpuflag(fma3) && notcpuflag(fma4)
1471 %error use of ``%5%6'' fma instruction in cpuname function: current_function
1472 %elif cpuflag(fma4)
1473 v%5%6 %1, %2, %3, %4
1474 %elifidn %1, %2
1475 ; If %3 or %4 is a memory operand it needs to be encoded as the last operand.
1476 %ifid %3
1477 v%{5}213%6 %2, %3, %4
1478 %else
1479 v%{5}132%6 %2, %4, %3
1480 %endif
1481 %elifidn %1, %3
1482 v%{5}213%6 %3, %2, %4
1483 %elifidn %1, %4
1484 v%{5}231%6 %4, %2, %3
1485 %else
1486 %error fma3 emulation of ``%5%6 %1, %2, %3, %4'' is not supported
1487 %endif
1488 %endmacro
1489 %rotate 1
1490 %endrep
1491 %pop
1492 %endmacro
1493
1494 FMA4_INSTR fmadd, pd, ps, sd, ss
1495 FMA4_INSTR fmaddsub, pd, ps
1496 FMA4_INSTR fmsub, pd, ps, sd, ss
1497 FMA4_INSTR fmsubadd, pd, ps
1498 FMA4_INSTR fnmadd, pd, ps, sd, ss
1499 FMA4_INSTR fnmsub, pd, ps, sd, ss
1500
1501 ; workaround: vpbroadcastq is broken in x86_32 due to a yasm bug (fixed in 1.3.0)
1502 %ifdef __YASM_VER__
1503 %if __YASM_VERSION_ID__ < 0x01030000 && ARCH_X86_64 == 0
1504 %macro vpbroadcastq 2
1505 %if sizeof%1 == 16
1506 movddup %1, %2
1507 %else
1508 vbroadcastsd %1, %2
1509 %endif
1510 %endmacro
1511 %endif
1512 %endif