x86inc: Support arbitrary stack alignments
[libav.git] / libavutil / x86 / x86inc.asm
1 ;*****************************************************************************
2 ;* x86inc.asm: x264asm abstraction layer
3 ;*****************************************************************************
4 ;* Copyright (C) 2005-2013 x264 project
5 ;*
6 ;* Authors: Loren Merritt <lorenm@u.washington.edu>
7 ;* Anton Mitrofanov <BugMaster@narod.ru>
8 ;* Fiona Glaser <fiona@x264.com>
9 ;* Henrik Gramner <henrik@gramner.com>
10 ;*
11 ;* Permission to use, copy, modify, and/or distribute this software for any
12 ;* purpose with or without fee is hereby granted, provided that the above
13 ;* copyright notice and this permission notice appear in all copies.
14 ;*
15 ;* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
16 ;* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
17 ;* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
18 ;* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
19 ;* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
20 ;* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
21 ;* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
22 ;*****************************************************************************
23
24 ; This is a header file for the x264ASM assembly language, which uses
25 ; NASM/YASM syntax combined with a large number of macros to provide easy
26 ; abstraction between different calling conventions (x86_32, win64, linux64).
27 ; It also has various other useful features to simplify writing the kind of
28 ; DSP functions that are most often used in x264.
29
30 ; Unlike the rest of x264, this file is available under an ISC license, as it
31 ; has significant usefulness outside of x264 and we want it to be available
32 ; to the largest audience possible. Of course, if you modify it for your own
33 ; purposes to add a new feature, we strongly encourage contributing a patch
34 ; as this feature might be useful for others as well. Send patches or ideas
35 ; to x264-devel@videolan.org .
36
37 %ifndef private_prefix
38 %define private_prefix x264
39 %endif
40
41 %ifndef public_prefix
42 %define public_prefix private_prefix
43 %endif
44
45 %if HAVE_ALIGNED_STACK
46 %define STACK_ALIGNMENT 16
47 %endif
48 %ifndef STACK_ALIGNMENT
49 %if ARCH_X86_64
50 %define STACK_ALIGNMENT 16
51 %else
52 %define STACK_ALIGNMENT 4
53 %endif
54 %endif
55
56 %define WIN64 0
57 %define UNIX64 0
58 %if ARCH_X86_64
59 %ifidn __OUTPUT_FORMAT__,win32
60 %define WIN64 1
61 %elifidn __OUTPUT_FORMAT__,win64
62 %define WIN64 1
63 %elifidn __OUTPUT_FORMAT__,x64
64 %define WIN64 1
65 %else
66 %define UNIX64 1
67 %endif
68 %endif
69
70 %ifdef PREFIX
71 %define mangle(x) _ %+ x
72 %else
73 %define mangle(x) x
74 %endif
75
76 ; aout does not support align=
77 ; NOTE: This section is out of sync with x264, in order to
78 ; keep supporting OS/2.
79 %macro SECTION_RODATA 0-1 16
80 %ifidn __OUTPUT_FORMAT__,aout
81 section .text
82 %else
83 SECTION .rodata align=%1
84 %endif
85 %endmacro
86
87 %macro SECTION_TEXT 0-1 16
88 %ifidn __OUTPUT_FORMAT__,aout
89 SECTION .text
90 %else
91 SECTION .text align=%1
92 %endif
93 %endmacro
94
95 %if WIN64
96 %define PIC
97 %elif ARCH_X86_64 == 0
98 ; x86_32 doesn't require PIC.
99 ; Some distros prefer shared objects to be PIC, but nothing breaks if
100 ; the code contains a few textrels, so we'll skip that complexity.
101 %undef PIC
102 %endif
103 %ifdef PIC
104 default rel
105 %endif
106
107 %macro CPUNOP 1
108 %if HAVE_CPUNOP
109 CPU %1
110 %endif
111 %endmacro
112
113 ; Macros to eliminate most code duplication between x86_32 and x86_64:
114 ; Currently this works only for leaf functions which load all their arguments
115 ; into registers at the start, and make no other use of the stack. Luckily that
116 ; covers most of x264's asm.
117
118 ; PROLOGUE:
119 ; %1 = number of arguments. loads them from stack if needed.
120 ; %2 = number of registers used. pushes callee-saved regs if needed.
121 ; %3 = number of xmm registers used. pushes callee-saved xmm regs if needed.
122 ; %4 = (optional) stack size to be allocated. The stack will be aligned before
123 ; allocating the specified stack size. If the required stack alignment is
124 ; larger than the known stack alignment the stack will be manually aligned
125 ; and an extra register will be allocated to hold the original stack
126 ; pointer (to not invalidate r0m etc.). To prevent the use of an extra
127 ; register as stack pointer, request a negative stack size.
128 ; %4+/%5+ = list of names to define to registers
129 ; PROLOGUE can also be invoked by adding the same options to cglobal
130
131 ; e.g.
132 ; cglobal foo, 2,3,7,0x40, dst, src, tmp
133 ; declares a function (foo) that automatically loads two arguments (dst and
134 ; src) into registers, uses one additional register (tmp) plus 7 vector
135 ; registers (m0-m6) and allocates 0x40 bytes of stack space.
136
137 ; TODO Some functions can use some args directly from the stack. If they're the
138 ; last args then you can just not declare them, but if they're in the middle
139 ; we need more flexible macro.
140
141 ; RET:
142 ; Pops anything that was pushed by PROLOGUE, and returns.
143
144 ; REP_RET:
145 ; Use this instead of RET if it's a branch target.
146
147 ; registers:
148 ; rN and rNq are the native-size register holding function argument N
149 ; rNd, rNw, rNb are dword, word, and byte size
150 ; rNh is the high 8 bits of the word size
151 ; rNm is the original location of arg N (a register or on the stack), dword
152 ; rNmp is native size
153
154 %macro DECLARE_REG 2-3
155 %define r%1q %2
156 %define r%1d %2d
157 %define r%1w %2w
158 %define r%1b %2b
159 %define r%1h %2h
160 %define %2q %2
161 %if %0 == 2
162 %define r%1m %2d
163 %define r%1mp %2
164 %elif ARCH_X86_64 ; memory
165 %define r%1m [rstk + stack_offset + %3]
166 %define r%1mp qword r %+ %1 %+ m
167 %else
168 %define r%1m [rstk + stack_offset + %3]
169 %define r%1mp dword r %+ %1 %+ m
170 %endif
171 %define r%1 %2
172 %endmacro
173
174 %macro DECLARE_REG_SIZE 3
175 %define r%1q r%1
176 %define e%1q r%1
177 %define r%1d e%1
178 %define e%1d e%1
179 %define r%1w %1
180 %define e%1w %1
181 %define r%1h %3
182 %define e%1h %3
183 %define r%1b %2
184 %define e%1b %2
185 %if ARCH_X86_64 == 0
186 %define r%1 e%1
187 %endif
188 %endmacro
189
190 DECLARE_REG_SIZE ax, al, ah
191 DECLARE_REG_SIZE bx, bl, bh
192 DECLARE_REG_SIZE cx, cl, ch
193 DECLARE_REG_SIZE dx, dl, dh
194 DECLARE_REG_SIZE si, sil, null
195 DECLARE_REG_SIZE di, dil, null
196 DECLARE_REG_SIZE bp, bpl, null
197
198 ; t# defines for when per-arch register allocation is more complex than just function arguments
199
200 %macro DECLARE_REG_TMP 1-*
201 %assign %%i 0
202 %rep %0
203 CAT_XDEFINE t, %%i, r%1
204 %assign %%i %%i+1
205 %rotate 1
206 %endrep
207 %endmacro
208
209 %macro DECLARE_REG_TMP_SIZE 0-*
210 %rep %0
211 %define t%1q t%1 %+ q
212 %define t%1d t%1 %+ d
213 %define t%1w t%1 %+ w
214 %define t%1h t%1 %+ h
215 %define t%1b t%1 %+ b
216 %rotate 1
217 %endrep
218 %endmacro
219
220 DECLARE_REG_TMP_SIZE 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14
221
222 %if ARCH_X86_64
223 %define gprsize 8
224 %else
225 %define gprsize 4
226 %endif
227
228 %macro PUSH 1
229 push %1
230 %ifidn rstk, rsp
231 %assign stack_offset stack_offset+gprsize
232 %endif
233 %endmacro
234
235 %macro POP 1
236 pop %1
237 %ifidn rstk, rsp
238 %assign stack_offset stack_offset-gprsize
239 %endif
240 %endmacro
241
242 %macro PUSH_IF_USED 1-*
243 %rep %0
244 %if %1 < regs_used
245 PUSH r%1
246 %endif
247 %rotate 1
248 %endrep
249 %endmacro
250
251 %macro POP_IF_USED 1-*
252 %rep %0
253 %if %1 < regs_used
254 pop r%1
255 %endif
256 %rotate 1
257 %endrep
258 %endmacro
259
260 %macro LOAD_IF_USED 1-*
261 %rep %0
262 %if %1 < num_args
263 mov r%1, r %+ %1 %+ mp
264 %endif
265 %rotate 1
266 %endrep
267 %endmacro
268
269 %macro SUB 2
270 sub %1, %2
271 %ifidn %1, rstk
272 %assign stack_offset stack_offset+(%2)
273 %endif
274 %endmacro
275
276 %macro ADD 2
277 add %1, %2
278 %ifidn %1, rstk
279 %assign stack_offset stack_offset-(%2)
280 %endif
281 %endmacro
282
283 %macro movifnidn 2
284 %ifnidn %1, %2
285 mov %1, %2
286 %endif
287 %endmacro
288
289 %macro movsxdifnidn 2
290 %ifnidn %1, %2
291 movsxd %1, %2
292 %endif
293 %endmacro
294
295 %macro ASSERT 1
296 %if (%1) == 0
297 %error assert failed
298 %endif
299 %endmacro
300
301 %macro DEFINE_ARGS 0-*
302 %ifdef n_arg_names
303 %assign %%i 0
304 %rep n_arg_names
305 CAT_UNDEF arg_name %+ %%i, q
306 CAT_UNDEF arg_name %+ %%i, d
307 CAT_UNDEF arg_name %+ %%i, w
308 CAT_UNDEF arg_name %+ %%i, h
309 CAT_UNDEF arg_name %+ %%i, b
310 CAT_UNDEF arg_name %+ %%i, m
311 CAT_UNDEF arg_name %+ %%i, mp
312 CAT_UNDEF arg_name, %%i
313 %assign %%i %%i+1
314 %endrep
315 %endif
316
317 %xdefine %%stack_offset stack_offset
318 %undef stack_offset ; so that the current value of stack_offset doesn't get baked in by xdefine
319 %assign %%i 0
320 %rep %0
321 %xdefine %1q r %+ %%i %+ q
322 %xdefine %1d r %+ %%i %+ d
323 %xdefine %1w r %+ %%i %+ w
324 %xdefine %1h r %+ %%i %+ h
325 %xdefine %1b r %+ %%i %+ b
326 %xdefine %1m r %+ %%i %+ m
327 %xdefine %1mp r %+ %%i %+ mp
328 CAT_XDEFINE arg_name, %%i, %1
329 %assign %%i %%i+1
330 %rotate 1
331 %endrep
332 %xdefine stack_offset %%stack_offset
333 %assign n_arg_names %0
334 %endmacro
335
336 %define required_stack_alignment ((mmsize + 15) & ~15)
337
338 %macro ALLOC_STACK 1-2 0 ; stack_size, n_xmm_regs (for win64 only)
339 %ifnum %1
340 %if %1 != 0
341 %assign %%pad 0
342 %assign stack_size %1
343 %if stack_size < 0
344 %assign stack_size -stack_size
345 %endif
346 %if WIN64
347 %assign %%pad %%pad + 32 ; shadow space
348 %if mmsize != 8
349 %assign xmm_regs_used %2
350 %if xmm_regs_used > 8
351 %assign %%pad %%pad + (xmm_regs_used-8)*16 ; callee-saved xmm registers
352 %endif
353 %endif
354 %endif
355 %if required_stack_alignment <= STACK_ALIGNMENT
356 ; maintain the current stack alignment
357 %assign stack_size_padded stack_size + %%pad + ((-%%pad-stack_offset-gprsize) & (STACK_ALIGNMENT-1))
358 SUB rsp, stack_size_padded
359 %else
360 %assign %%reg_num (regs_used - 1)
361 %xdefine rstk r %+ %%reg_num
362 ; align stack, and save original stack location directly above
363 ; it, i.e. in [rsp+stack_size_padded], so we can restore the
364 ; stack in a single instruction (i.e. mov rsp, rstk or mov
365 ; rsp, [rsp+stack_size_padded])
366 %if %1 < 0 ; need to store rsp on stack
367 %xdefine rstkm [rsp + stack_size + %%pad]
368 %assign %%pad %%pad + gprsize
369 %else ; can keep rsp in rstk during whole function
370 %xdefine rstkm rstk
371 %endif
372 %assign stack_size_padded stack_size + ((%%pad + required_stack_alignment-1) & ~(required_stack_alignment-1))
373 mov rstk, rsp
374 and rsp, ~(required_stack_alignment-1)
375 sub rsp, stack_size_padded
376 movifnidn rstkm, rstk
377 %endif
378 WIN64_PUSH_XMM
379 %endif
380 %endif
381 %endmacro
382
383 %macro SETUP_STACK_POINTER 1
384 %ifnum %1
385 %if %1 != 0 && required_stack_alignment > STACK_ALIGNMENT
386 %if %1 > 0
387 %assign regs_used (regs_used + 1)
388 %elif ARCH_X86_64 && regs_used == num_args && num_args <= 4 + UNIX64 * 2
389 %warning "Stack pointer will overwrite register argument"
390 %endif
391 %endif
392 %endif
393 %endmacro
394
395 %macro DEFINE_ARGS_INTERNAL 3+
396 %ifnum %2
397 DEFINE_ARGS %3
398 %elif %1 == 4
399 DEFINE_ARGS %2
400 %elif %1 > 4
401 DEFINE_ARGS %2, %3
402 %endif
403 %endmacro
404
405 %if WIN64 ; Windows x64 ;=================================================
406
407 DECLARE_REG 0, rcx
408 DECLARE_REG 1, rdx
409 DECLARE_REG 2, R8
410 DECLARE_REG 3, R9
411 DECLARE_REG 4, R10, 40
412 DECLARE_REG 5, R11, 48
413 DECLARE_REG 6, rax, 56
414 DECLARE_REG 7, rdi, 64
415 DECLARE_REG 8, rsi, 72
416 DECLARE_REG 9, rbx, 80
417 DECLARE_REG 10, rbp, 88
418 DECLARE_REG 11, R12, 96
419 DECLARE_REG 12, R13, 104
420 DECLARE_REG 13, R14, 112
421 DECLARE_REG 14, R15, 120
422
423 %macro PROLOGUE 2-5+ 0 ; #args, #regs, #xmm_regs, [stack_size,] arg_names...
424 %assign num_args %1
425 %assign regs_used %2
426 ASSERT regs_used >= num_args
427 SETUP_STACK_POINTER %4
428 ASSERT regs_used <= 15
429 PUSH_IF_USED 7, 8, 9, 10, 11, 12, 13, 14
430 ALLOC_STACK %4, %3
431 %if mmsize != 8 && stack_size == 0
432 WIN64_SPILL_XMM %3
433 %endif
434 LOAD_IF_USED 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
435 DEFINE_ARGS_INTERNAL %0, %4, %5
436 %endmacro
437
438 %macro WIN64_PUSH_XMM 0
439 ; Use the shadow space to store XMM6 and XMM7, the rest needs stack space allocated.
440 %if xmm_regs_used > 6
441 movaps [rstk + stack_offset + 8], xmm6
442 %endif
443 %if xmm_regs_used > 7
444 movaps [rstk + stack_offset + 24], xmm7
445 %endif
446 %if xmm_regs_used > 8
447 %assign %%i 8
448 %rep xmm_regs_used-8
449 movaps [rsp + (%%i-8)*16 + stack_size + 32], xmm %+ %%i
450 %assign %%i %%i+1
451 %endrep
452 %endif
453 %endmacro
454
455 %macro WIN64_SPILL_XMM 1
456 %assign xmm_regs_used %1
457 ASSERT xmm_regs_used <= 16
458 %if xmm_regs_used > 8
459 ; Allocate stack space for callee-saved xmm registers plus shadow space and align the stack.
460 %assign %%pad (xmm_regs_used-8)*16 + 32
461 %assign stack_size_padded %%pad + ((-%%pad-stack_offset-gprsize) & (STACK_ALIGNMENT-1))
462 SUB rsp, stack_size_padded
463 %endif
464 WIN64_PUSH_XMM
465 %endmacro
466
467 %macro WIN64_RESTORE_XMM_INTERNAL 1
468 %assign %%pad_size 0
469 %if xmm_regs_used > 8
470 %assign %%i xmm_regs_used
471 %rep xmm_regs_used-8
472 %assign %%i %%i-1
473 movaps xmm %+ %%i, [%1 + (%%i-8)*16 + stack_size + 32]
474 %endrep
475 %endif
476 %if stack_size_padded > 0
477 %if stack_size > 0 && required_stack_alignment > STACK_ALIGNMENT
478 mov rsp, rstkm
479 %else
480 add %1, stack_size_padded
481 %assign %%pad_size stack_size_padded
482 %endif
483 %endif
484 %if xmm_regs_used > 7
485 movaps xmm7, [%1 + stack_offset - %%pad_size + 24]
486 %endif
487 %if xmm_regs_used > 6
488 movaps xmm6, [%1 + stack_offset - %%pad_size + 8]
489 %endif
490 %endmacro
491
492 %macro WIN64_RESTORE_XMM 1
493 WIN64_RESTORE_XMM_INTERNAL %1
494 %assign stack_offset (stack_offset-stack_size_padded)
495 %assign xmm_regs_used 0
496 %endmacro
497
498 %define has_epilogue regs_used > 7 || xmm_regs_used > 6 || mmsize == 32 || stack_size > 0
499
500 %macro RET 0
501 WIN64_RESTORE_XMM_INTERNAL rsp
502 POP_IF_USED 14, 13, 12, 11, 10, 9, 8, 7
503 %if mmsize == 32
504 vzeroupper
505 %endif
506 AUTO_REP_RET
507 %endmacro
508
509 %elif ARCH_X86_64 ; *nix x64 ;=============================================
510
511 DECLARE_REG 0, rdi
512 DECLARE_REG 1, rsi
513 DECLARE_REG 2, rdx
514 DECLARE_REG 3, rcx
515 DECLARE_REG 4, R8
516 DECLARE_REG 5, R9
517 DECLARE_REG 6, rax, 8
518 DECLARE_REG 7, R10, 16
519 DECLARE_REG 8, R11, 24
520 DECLARE_REG 9, rbx, 32
521 DECLARE_REG 10, rbp, 40
522 DECLARE_REG 11, R12, 48
523 DECLARE_REG 12, R13, 56
524 DECLARE_REG 13, R14, 64
525 DECLARE_REG 14, R15, 72
526
527 %macro PROLOGUE 2-5+ ; #args, #regs, #xmm_regs, [stack_size,] arg_names...
528 %assign num_args %1
529 %assign regs_used %2
530 ASSERT regs_used >= num_args
531 SETUP_STACK_POINTER %4
532 ASSERT regs_used <= 15
533 PUSH_IF_USED 9, 10, 11, 12, 13, 14
534 ALLOC_STACK %4
535 LOAD_IF_USED 6, 7, 8, 9, 10, 11, 12, 13, 14
536 DEFINE_ARGS_INTERNAL %0, %4, %5
537 %endmacro
538
539 %define has_epilogue regs_used > 9 || mmsize == 32 || stack_size > 0
540
541 %macro RET 0
542 %if stack_size_padded > 0
543 %if required_stack_alignment > STACK_ALIGNMENT
544 mov rsp, rstkm
545 %else
546 add rsp, stack_size_padded
547 %endif
548 %endif
549 POP_IF_USED 14, 13, 12, 11, 10, 9
550 %if mmsize == 32
551 vzeroupper
552 %endif
553 AUTO_REP_RET
554 %endmacro
555
556 %else ; X86_32 ;==============================================================
557
558 DECLARE_REG 0, eax, 4
559 DECLARE_REG 1, ecx, 8
560 DECLARE_REG 2, edx, 12
561 DECLARE_REG 3, ebx, 16
562 DECLARE_REG 4, esi, 20
563 DECLARE_REG 5, edi, 24
564 DECLARE_REG 6, ebp, 28
565 %define rsp esp
566
567 %macro DECLARE_ARG 1-*
568 %rep %0
569 %define r%1m [rstk + stack_offset + 4*%1 + 4]
570 %define r%1mp dword r%1m
571 %rotate 1
572 %endrep
573 %endmacro
574
575 DECLARE_ARG 7, 8, 9, 10, 11, 12, 13, 14
576
577 %macro PROLOGUE 2-5+ ; #args, #regs, #xmm_regs, [stack_size,] arg_names...
578 %assign num_args %1
579 %assign regs_used %2
580 ASSERT regs_used >= num_args
581 %if num_args > 7
582 %assign num_args 7
583 %endif
584 %if regs_used > 7
585 %assign regs_used 7
586 %endif
587 SETUP_STACK_POINTER %4
588 ASSERT regs_used <= 7
589 PUSH_IF_USED 3, 4, 5, 6
590 ALLOC_STACK %4
591 LOAD_IF_USED 0, 1, 2, 3, 4, 5, 6
592 DEFINE_ARGS_INTERNAL %0, %4, %5
593 %endmacro
594
595 %define has_epilogue regs_used > 3 || mmsize == 32 || stack_size > 0
596
597 %macro RET 0
598 %if stack_size_padded > 0
599 %if required_stack_alignment > STACK_ALIGNMENT
600 mov rsp, rstkm
601 %else
602 add rsp, stack_size_padded
603 %endif
604 %endif
605 POP_IF_USED 6, 5, 4, 3
606 %if mmsize == 32
607 vzeroupper
608 %endif
609 AUTO_REP_RET
610 %endmacro
611
612 %endif ;======================================================================
613
614 %if WIN64 == 0
615 %macro WIN64_SPILL_XMM 1
616 %endmacro
617 %macro WIN64_RESTORE_XMM 1
618 %endmacro
619 %macro WIN64_PUSH_XMM 0
620 %endmacro
621 %endif
622
623 ; On AMD cpus <=K10, an ordinary ret is slow if it immediately follows either
624 ; a branch or a branch target. So switch to a 2-byte form of ret in that case.
625 ; We can automatically detect "follows a branch", but not a branch target.
626 ; (SSSE3 is a sufficient condition to know that your cpu doesn't have this problem.)
627 %macro REP_RET 0
628 %if has_epilogue
629 RET
630 %else
631 rep ret
632 %endif
633 %endmacro
634
635 %define last_branch_adr $$
636 %macro AUTO_REP_RET 0
637 %ifndef cpuflags
638 times ((last_branch_adr-$)>>31)+1 rep ; times 1 iff $ != last_branch_adr.
639 %elif notcpuflag(ssse3)
640 times ((last_branch_adr-$)>>31)+1 rep
641 %endif
642 ret
643 %endmacro
644
645 %macro BRANCH_INSTR 0-*
646 %rep %0
647 %macro %1 1-2 %1
648 %2 %1
649 %%branch_instr:
650 %xdefine last_branch_adr %%branch_instr
651 %endmacro
652 %rotate 1
653 %endrep
654 %endmacro
655
656 BRANCH_INSTR jz, je, jnz, jne, jl, jle, jnl, jnle, jg, jge, jng, jnge, ja, jae, jna, jnae, jb, jbe, jnb, jnbe, jc, jnc, js, jns, jo, jno, jp, jnp
657
658 %macro TAIL_CALL 2 ; callee, is_nonadjacent
659 %if has_epilogue
660 call %1
661 RET
662 %elif %2
663 jmp %1
664 %endif
665 %endmacro
666
667 ;=============================================================================
668 ; arch-independent part
669 ;=============================================================================
670
671 %assign function_align 16
672
673 ; Begin a function.
674 ; Applies any symbol mangling needed for C linkage, and sets up a define such that
675 ; subsequent uses of the function name automatically refer to the mangled version.
676 ; Appends cpuflags to the function name if cpuflags has been specified.
677 ; The "" empty default parameter is a workaround for nasm, which fails if SUFFIX
678 ; is empty and we call cglobal_internal with just %1 %+ SUFFIX (without %2).
679 %macro cglobal 1-2+ "" ; name, [PROLOGUE args]
680 cglobal_internal 1, %1 %+ SUFFIX, %2
681 %endmacro
682 %macro cvisible 1-2+ "" ; name, [PROLOGUE args]
683 cglobal_internal 0, %1 %+ SUFFIX, %2
684 %endmacro
685 %macro cglobal_internal 2-3+
686 %if %1
687 %xdefine %%FUNCTION_PREFIX private_prefix
688 %xdefine %%VISIBILITY hidden
689 %else
690 %xdefine %%FUNCTION_PREFIX public_prefix
691 %xdefine %%VISIBILITY
692 %endif
693 %ifndef cglobaled_%2
694 %xdefine %2 mangle(%%FUNCTION_PREFIX %+ _ %+ %2)
695 %xdefine %2.skip_prologue %2 %+ .skip_prologue
696 CAT_XDEFINE cglobaled_, %2, 1
697 %endif
698 %xdefine current_function %2
699 %ifidn __OUTPUT_FORMAT__,elf
700 global %2:function %%VISIBILITY
701 %else
702 global %2
703 %endif
704 align function_align
705 %2:
706 RESET_MM_PERMUTATION ; needed for x86-64, also makes disassembly somewhat nicer
707 %xdefine rstk rsp ; copy of the original stack pointer, used when greater alignment than the known stack alignment is required
708 %assign stack_offset 0 ; stack pointer offset relative to the return address
709 %assign stack_size 0 ; amount of stack space that can be freely used inside a function
710 %assign stack_size_padded 0 ; total amount of allocated stack space, including space for callee-saved xmm registers on WIN64 and alignment padding
711 %assign xmm_regs_used 0 ; number of XMM registers requested, used for dealing with callee-saved registers on WIN64
712 %ifnidn %3, ""
713 PROLOGUE %3
714 %endif
715 %endmacro
716
717 %macro cextern 1
718 %xdefine %1 mangle(private_prefix %+ _ %+ %1)
719 CAT_XDEFINE cglobaled_, %1, 1
720 extern %1
721 %endmacro
722
723 ; like cextern, but without the prefix
724 %macro cextern_naked 1
725 %xdefine %1 mangle(%1)
726 CAT_XDEFINE cglobaled_, %1, 1
727 extern %1
728 %endmacro
729
730 %macro const 1-2+
731 %xdefine %1 mangle(private_prefix %+ _ %+ %1)
732 %ifidn __OUTPUT_FORMAT__,elf
733 global %1:data hidden
734 %else
735 global %1
736 %endif
737 %1: %2
738 %endmacro
739
740 ; This is needed for ELF, otherwise the GNU linker assumes the stack is
741 ; executable by default.
742 %ifidn __OUTPUT_FORMAT__,elf
743 [section .note.GNU-stack noalloc noexec nowrite progbits]
744 %endif
745
746 ; Overrides the default .text section.
747 ; Silences warnings when defining structures.
748 %define __SECT__
749
750 ; cpuflags
751
752 %assign cpuflags_mmx (1<<0)
753 %assign cpuflags_mmx2 (1<<1) | cpuflags_mmx
754 %assign cpuflags_3dnow (1<<2) | cpuflags_mmx
755 %assign cpuflags_3dnowext (1<<3) | cpuflags_3dnow
756 %assign cpuflags_sse (1<<4) | cpuflags_mmx2
757 %assign cpuflags_sse2 (1<<5) | cpuflags_sse
758 %assign cpuflags_sse2slow (1<<6) | cpuflags_sse2
759 %assign cpuflags_sse3 (1<<7) | cpuflags_sse2
760 %assign cpuflags_ssse3 (1<<8) | cpuflags_sse3
761 %assign cpuflags_sse4 (1<<9) | cpuflags_ssse3
762 %assign cpuflags_sse42 (1<<10)| cpuflags_sse4
763 %assign cpuflags_avx (1<<11)| cpuflags_sse42
764 %assign cpuflags_xop (1<<12)| cpuflags_avx
765 %assign cpuflags_fma4 (1<<13)| cpuflags_avx
766 %assign cpuflags_avx2 (1<<14)| cpuflags_avx
767 %assign cpuflags_fma3 (1<<15)| cpuflags_avx
768
769 %assign cpuflags_cache32 (1<<16)
770 %assign cpuflags_cache64 (1<<17)
771 %assign cpuflags_slowctz (1<<18)
772 %assign cpuflags_lzcnt (1<<19)
773 %assign cpuflags_aligned (1<<20) ; not a cpu feature, but a function variant
774 %assign cpuflags_atom (1<<21)
775 %assign cpuflags_bmi1 (1<<22)|cpuflags_lzcnt
776 %assign cpuflags_bmi2 (1<<23)|cpuflags_bmi1
777
778 %define cpuflag(x) ((cpuflags & (cpuflags_ %+ x)) == (cpuflags_ %+ x))
779 %define notcpuflag(x) ((cpuflags & (cpuflags_ %+ x)) != (cpuflags_ %+ x))
780
781 ; Takes an arbitrary number of cpuflags from the above list.
782 ; All subsequent functions (up to the next INIT_CPUFLAGS) is built for the specified cpu.
783 ; You shouldn't need to invoke this macro directly, it's a subroutine for INIT_MMX &co.
784 %macro INIT_CPUFLAGS 0-*
785 %xdefine SUFFIX
786 %undef cpuname
787 %assign cpuflags 0
788
789 %if %0 >= 1
790 %rep %0
791 %ifdef cpuname
792 %xdefine cpuname cpuname %+ _%1
793 %else
794 %xdefine cpuname %1
795 %endif
796 %assign cpuflags cpuflags | cpuflags_%1
797 %rotate 1
798 %endrep
799 %xdefine SUFFIX _ %+ cpuname
800
801 %if cpuflag(avx)
802 %assign avx_enabled 1
803 %endif
804 %if (mmsize == 16 && notcpuflag(sse2)) || (mmsize == 32 && notcpuflag(avx2))
805 %define mova movaps
806 %define movu movups
807 %define movnta movntps
808 %endif
809 %if cpuflag(aligned)
810 %define movu mova
811 %elif cpuflag(sse3) && notcpuflag(ssse3)
812 %define movu lddqu
813 %endif
814 %endif
815
816 %if cpuflag(sse2)
817 CPUNOP amdnop
818 %else
819 CPUNOP basicnop
820 %endif
821 %endmacro
822
823 ; Merge mmx and sse*
824 ; m# is a simd register of the currently selected size
825 ; xm# is the corresponding xmm register if mmsize >= 16, otherwise the same as m#
826 ; ym# is the corresponding ymm register if mmsize >= 32, otherwise the same as m#
827 ; (All 3 remain in sync through SWAP.)
828
829 %macro CAT_XDEFINE 3
830 %xdefine %1%2 %3
831 %endmacro
832
833 %macro CAT_UNDEF 2
834 %undef %1%2
835 %endmacro
836
837 %macro INIT_MMX 0-1+
838 %assign avx_enabled 0
839 %define RESET_MM_PERMUTATION INIT_MMX %1
840 %define mmsize 8
841 %define num_mmregs 8
842 %define mova movq
843 %define movu movq
844 %define movh movd
845 %define movnta movntq
846 %assign %%i 0
847 %rep 8
848 CAT_XDEFINE m, %%i, mm %+ %%i
849 CAT_XDEFINE nnmm, %%i, %%i
850 %assign %%i %%i+1
851 %endrep
852 %rep 8
853 CAT_UNDEF m, %%i
854 CAT_UNDEF nnmm, %%i
855 %assign %%i %%i+1
856 %endrep
857 INIT_CPUFLAGS %1
858 %endmacro
859
860 %macro INIT_XMM 0-1+
861 %assign avx_enabled 0
862 %define RESET_MM_PERMUTATION INIT_XMM %1
863 %define mmsize 16
864 %define num_mmregs 8
865 %if ARCH_X86_64
866 %define num_mmregs 16
867 %endif
868 %define mova movdqa
869 %define movu movdqu
870 %define movh movq
871 %define movnta movntdq
872 %assign %%i 0
873 %rep num_mmregs
874 CAT_XDEFINE m, %%i, xmm %+ %%i
875 CAT_XDEFINE nnxmm, %%i, %%i
876 %assign %%i %%i+1
877 %endrep
878 INIT_CPUFLAGS %1
879 %endmacro
880
881 %macro INIT_YMM 0-1+
882 %assign avx_enabled 1
883 %define RESET_MM_PERMUTATION INIT_YMM %1
884 %define mmsize 32
885 %define num_mmregs 8
886 %if ARCH_X86_64
887 %define num_mmregs 16
888 %endif
889 %define mova movdqa
890 %define movu movdqu
891 %undef movh
892 %define movnta movntdq
893 %assign %%i 0
894 %rep num_mmregs
895 CAT_XDEFINE m, %%i, ymm %+ %%i
896 CAT_XDEFINE nymm, %%i, %%i
897 %assign %%i %%i+1
898 %endrep
899 INIT_CPUFLAGS %1
900 %endmacro
901
902 INIT_XMM
903
904 %macro DECLARE_MMCAST 1
905 %define mmmm%1 mm%1
906 %define mmxmm%1 mm%1
907 %define mmymm%1 mm%1
908 %define xmmmm%1 mm%1
909 %define xmmxmm%1 xmm%1
910 %define xmmymm%1 xmm%1
911 %define ymmmm%1 mm%1
912 %define ymmxmm%1 xmm%1
913 %define ymmymm%1 ymm%1
914 %define xm%1 xmm %+ m%1
915 %define ym%1 ymm %+ m%1
916 %endmacro
917
918 %assign i 0
919 %rep 16
920 DECLARE_MMCAST i
921 %assign i i+1
922 %endrep
923
924 ; I often want to use macros that permute their arguments. e.g. there's no
925 ; efficient way to implement butterfly or transpose or dct without swapping some
926 ; arguments.
927 ;
928 ; I would like to not have to manually keep track of the permutations:
929 ; If I insert a permutation in the middle of a function, it should automatically
930 ; change everything that follows. For more complex macros I may also have multiple
931 ; implementations, e.g. the SSE2 and SSSE3 versions may have different permutations.
932 ;
933 ; Hence these macros. Insert a PERMUTE or some SWAPs at the end of a macro that
934 ; permutes its arguments. It's equivalent to exchanging the contents of the
935 ; registers, except that this way you exchange the register names instead, so it
936 ; doesn't cost any cycles.
937
938 %macro PERMUTE 2-* ; takes a list of pairs to swap
939 %rep %0/2
940 %xdefine %%tmp%2 m%2
941 %rotate 2
942 %endrep
943 %rep %0/2
944 %xdefine m%1 %%tmp%2
945 CAT_XDEFINE nn, m%1, %1
946 %rotate 2
947 %endrep
948 %endmacro
949
950 %macro SWAP 2+ ; swaps a single chain (sometimes more concise than pairs)
951 %ifnum %1 ; SWAP 0, 1, ...
952 SWAP_INTERNAL_NUM %1, %2
953 %else ; SWAP m0, m1, ...
954 SWAP_INTERNAL_NAME %1, %2
955 %endif
956 %endmacro
957
958 %macro SWAP_INTERNAL_NUM 2-*
959 %rep %0-1
960 %xdefine %%tmp m%1
961 %xdefine m%1 m%2
962 %xdefine m%2 %%tmp
963 CAT_XDEFINE nn, m%1, %1
964 CAT_XDEFINE nn, m%2, %2
965 %rotate 1
966 %endrep
967 %endmacro
968
969 %macro SWAP_INTERNAL_NAME 2-*
970 %xdefine %%args nn %+ %1
971 %rep %0-1
972 %xdefine %%args %%args, nn %+ %2
973 %rotate 1
974 %endrep
975 SWAP_INTERNAL_NUM %%args
976 %endmacro
977
978 ; If SAVE_MM_PERMUTATION is placed at the end of a function, then any later
979 ; calls to that function will automatically load the permutation, so values can
980 ; be returned in mmregs.
981 %macro SAVE_MM_PERMUTATION 0-1
982 %if %0
983 %xdefine %%f %1_m
984 %else
985 %xdefine %%f current_function %+ _m
986 %endif
987 %assign %%i 0
988 %rep num_mmregs
989 CAT_XDEFINE %%f, %%i, m %+ %%i
990 %assign %%i %%i+1
991 %endrep
992 %endmacro
993
994 %macro LOAD_MM_PERMUTATION 1 ; name to load from
995 %ifdef %1_m0
996 %assign %%i 0
997 %rep num_mmregs
998 CAT_XDEFINE m, %%i, %1_m %+ %%i
999 CAT_XDEFINE nn, m %+ %%i, %%i
1000 %assign %%i %%i+1
1001 %endrep
1002 %endif
1003 %endmacro
1004
1005 ; Append cpuflags to the callee's name iff the appended name is known and the plain name isn't
1006 %macro call 1
1007 call_internal %1 %+ SUFFIX, %1
1008 %endmacro
1009 %macro call_internal 2
1010 %xdefine %%i %2
1011 %ifndef cglobaled_%2
1012 %ifdef cglobaled_%1
1013 %xdefine %%i %1
1014 %endif
1015 %endif
1016 call %%i
1017 LOAD_MM_PERMUTATION %%i
1018 %endmacro
1019
1020 ; Substitutions that reduce instruction size but are functionally equivalent
1021 %macro add 2
1022 %ifnum %2
1023 %if %2==128
1024 sub %1, -128
1025 %else
1026 add %1, %2
1027 %endif
1028 %else
1029 add %1, %2
1030 %endif
1031 %endmacro
1032
1033 %macro sub 2
1034 %ifnum %2
1035 %if %2==128
1036 add %1, -128
1037 %else
1038 sub %1, %2
1039 %endif
1040 %else
1041 sub %1, %2
1042 %endif
1043 %endmacro
1044
1045 ;=============================================================================
1046 ; AVX abstraction layer
1047 ;=============================================================================
1048
1049 %assign i 0
1050 %rep 16
1051 %if i < 8
1052 CAT_XDEFINE sizeofmm, i, 8
1053 %endif
1054 CAT_XDEFINE sizeofxmm, i, 16
1055 CAT_XDEFINE sizeofymm, i, 32
1056 %assign i i+1
1057 %endrep
1058 %undef i
1059
1060 %macro CHECK_AVX_INSTR_EMU 3-*
1061 %xdefine %%opcode %1
1062 %xdefine %%dst %2
1063 %rep %0-2
1064 %ifidn %%dst, %3
1065 %error non-avx emulation of ``%%opcode'' is not supported
1066 %endif
1067 %rotate 1
1068 %endrep
1069 %endmacro
1070
1071 ;%1 == instruction
1072 ;%2 == 1 if float, 0 if int
1073 ;%3 == 1 if non-destructive or 4-operand (xmm, xmm, xmm, imm), 0 otherwise
1074 ;%4 == 1 if commutative (i.e. doesn't matter which src arg is which), 0 if not
1075 ;%5+: operands
1076 %macro RUN_AVX_INSTR 5-8+
1077 %ifnum sizeof%6
1078 %assign __sizeofreg sizeof%6
1079 %elifnum sizeof%5
1080 %assign __sizeofreg sizeof%5
1081 %else
1082 %assign __sizeofreg mmsize
1083 %endif
1084 %assign __emulate_avx 0
1085 %if avx_enabled && __sizeofreg >= 16
1086 %xdefine __instr v%1
1087 %else
1088 %xdefine __instr %1
1089 %if %0 >= 7+%3
1090 %assign __emulate_avx 1
1091 %endif
1092 %endif
1093
1094 %if __emulate_avx
1095 %xdefine __src1 %6
1096 %xdefine __src2 %7
1097 %ifnidn %5, %6
1098 %if %0 >= 8
1099 CHECK_AVX_INSTR_EMU {%1 %5, %6, %7, %8}, %5, %7, %8
1100 %else
1101 CHECK_AVX_INSTR_EMU {%1 %5, %6, %7}, %5, %7
1102 %endif
1103 %if %4 && %3 == 0
1104 %ifnid %7
1105 ; 3-operand AVX instructions with a memory arg can only have it in src2,
1106 ; whereas SSE emulation prefers to have it in src1 (i.e. the mov).
1107 ; So, if the instruction is commutative with a memory arg, swap them.
1108 %xdefine __src1 %7
1109 %xdefine __src2 %6
1110 %endif
1111 %endif
1112 %if __sizeofreg == 8
1113 MOVQ %5, __src1
1114 %elif %2
1115 MOVAPS %5, __src1
1116 %else
1117 MOVDQA %5, __src1
1118 %endif
1119 %endif
1120 %if %0 >= 8
1121 %1 %5, __src2, %8
1122 %else
1123 %1 %5, __src2
1124 %endif
1125 %elif %0 >= 8
1126 __instr %5, %6, %7, %8
1127 %elif %0 == 7
1128 __instr %5, %6, %7
1129 %elif %0 == 6
1130 __instr %5, %6
1131 %else
1132 __instr %5
1133 %endif
1134 %endmacro
1135
1136 ;%1 == instruction
1137 ;%2 == 1 if float, 0 if int
1138 ;%3 == 1 if non-destructive or 4-operand (xmm, xmm, xmm, imm), 0 otherwise
1139 ;%4 == 1 if commutative (i.e. doesn't matter which src arg is which), 0 if not
1140 %macro AVX_INSTR 1-4 0, 1, 0
1141 %macro %1 1-9 fnord, fnord, fnord, fnord, %1, %2, %3, %4
1142 %ifidn %2, fnord
1143 RUN_AVX_INSTR %6, %7, %8, %9, %1
1144 %elifidn %3, fnord
1145 RUN_AVX_INSTR %6, %7, %8, %9, %1, %2
1146 %elifidn %4, fnord
1147 RUN_AVX_INSTR %6, %7, %8, %9, %1, %2, %3
1148 %elifidn %5, fnord
1149 RUN_AVX_INSTR %6, %7, %8, %9, %1, %2, %3, %4
1150 %else
1151 RUN_AVX_INSTR %6, %7, %8, %9, %1, %2, %3, %4, %5
1152 %endif
1153 %endmacro
1154 %endmacro
1155
1156 ; Instructions with both VEX and non-VEX encodings
1157 ; Non-destructive instructions are written without parameters
1158 AVX_INSTR addpd, 1, 0, 1
1159 AVX_INSTR addps, 1, 0, 1
1160 AVX_INSTR addsd, 1, 0, 1
1161 AVX_INSTR addss, 1, 0, 1
1162 AVX_INSTR addsubpd, 1, 0, 0
1163 AVX_INSTR addsubps, 1, 0, 0
1164 AVX_INSTR aesdec, 0, 0, 0
1165 AVX_INSTR aesdeclast, 0, 0, 0
1166 AVX_INSTR aesenc, 0, 0, 0
1167 AVX_INSTR aesenclast, 0, 0, 0
1168 AVX_INSTR aesimc
1169 AVX_INSTR aeskeygenassist
1170 AVX_INSTR andnpd, 1, 0, 0
1171 AVX_INSTR andnps, 1, 0, 0
1172 AVX_INSTR andpd, 1, 0, 1
1173 AVX_INSTR andps, 1, 0, 1
1174 AVX_INSTR blendpd, 1, 0, 0
1175 AVX_INSTR blendps, 1, 0, 0
1176 AVX_INSTR blendvpd, 1, 0, 0
1177 AVX_INSTR blendvps, 1, 0, 0
1178 AVX_INSTR cmppd, 1, 1, 0
1179 AVX_INSTR cmpps, 1, 1, 0
1180 AVX_INSTR cmpsd, 1, 1, 0
1181 AVX_INSTR cmpss, 1, 1, 0
1182 AVX_INSTR comisd
1183 AVX_INSTR comiss
1184 AVX_INSTR cvtdq2pd
1185 AVX_INSTR cvtdq2ps
1186 AVX_INSTR cvtpd2dq
1187 AVX_INSTR cvtpd2ps
1188 AVX_INSTR cvtps2dq
1189 AVX_INSTR cvtps2pd
1190 AVX_INSTR cvtsd2si
1191 AVX_INSTR cvtsd2ss
1192 AVX_INSTR cvtsi2sd
1193 AVX_INSTR cvtsi2ss
1194 AVX_INSTR cvtss2sd
1195 AVX_INSTR cvtss2si
1196 AVX_INSTR cvttpd2dq
1197 AVX_INSTR cvttps2dq
1198 AVX_INSTR cvttsd2si
1199 AVX_INSTR cvttss2si
1200 AVX_INSTR divpd, 1, 0, 0
1201 AVX_INSTR divps, 1, 0, 0
1202 AVX_INSTR divsd, 1, 0, 0
1203 AVX_INSTR divss, 1, 0, 0
1204 AVX_INSTR dppd, 1, 1, 0
1205 AVX_INSTR dpps, 1, 1, 0
1206 AVX_INSTR extractps
1207 AVX_INSTR haddpd, 1, 0, 0
1208 AVX_INSTR haddps, 1, 0, 0
1209 AVX_INSTR hsubpd, 1, 0, 0
1210 AVX_INSTR hsubps, 1, 0, 0
1211 AVX_INSTR insertps, 1, 1, 0
1212 AVX_INSTR lddqu
1213 AVX_INSTR ldmxcsr
1214 AVX_INSTR maskmovdqu
1215 AVX_INSTR maxpd, 1, 0, 1
1216 AVX_INSTR maxps, 1, 0, 1
1217 AVX_INSTR maxsd, 1, 0, 1
1218 AVX_INSTR maxss, 1, 0, 1
1219 AVX_INSTR minpd, 1, 0, 1
1220 AVX_INSTR minps, 1, 0, 1
1221 AVX_INSTR minsd, 1, 0, 1
1222 AVX_INSTR minss, 1, 0, 1
1223 AVX_INSTR movapd
1224 AVX_INSTR movaps
1225 AVX_INSTR movd
1226 AVX_INSTR movddup
1227 AVX_INSTR movdqa
1228 AVX_INSTR movdqu
1229 AVX_INSTR movhlps, 1, 0, 0
1230 AVX_INSTR movhpd, 1, 0, 0
1231 AVX_INSTR movhps, 1, 0, 0
1232 AVX_INSTR movlhps, 1, 0, 0
1233 AVX_INSTR movlpd, 1, 0, 0
1234 AVX_INSTR movlps, 1, 0, 0
1235 AVX_INSTR movmskpd
1236 AVX_INSTR movmskps
1237 AVX_INSTR movntdq
1238 AVX_INSTR movntdqa
1239 AVX_INSTR movntpd
1240 AVX_INSTR movntps
1241 AVX_INSTR movq
1242 AVX_INSTR movsd, 1, 0, 0
1243 AVX_INSTR movshdup
1244 AVX_INSTR movsldup
1245 AVX_INSTR movss, 1, 0, 0
1246 AVX_INSTR movupd
1247 AVX_INSTR movups
1248 AVX_INSTR mpsadbw, 0, 1, 0
1249 AVX_INSTR mulpd, 1, 0, 1
1250 AVX_INSTR mulps, 1, 0, 1
1251 AVX_INSTR mulsd, 1, 0, 1
1252 AVX_INSTR mulss, 1, 0, 1
1253 AVX_INSTR orpd, 1, 0, 1
1254 AVX_INSTR orps, 1, 0, 1
1255 AVX_INSTR pabsb
1256 AVX_INSTR pabsd
1257 AVX_INSTR pabsw
1258 AVX_INSTR packsswb, 0, 0, 0
1259 AVX_INSTR packssdw, 0, 0, 0
1260 AVX_INSTR packuswb, 0, 0, 0
1261 AVX_INSTR packusdw, 0, 0, 0
1262 AVX_INSTR paddb, 0, 0, 1
1263 AVX_INSTR paddw, 0, 0, 1
1264 AVX_INSTR paddd, 0, 0, 1
1265 AVX_INSTR paddq, 0, 0, 1
1266 AVX_INSTR paddsb, 0, 0, 1
1267 AVX_INSTR paddsw, 0, 0, 1
1268 AVX_INSTR paddusb, 0, 0, 1
1269 AVX_INSTR paddusw, 0, 0, 1
1270 AVX_INSTR palignr, 0, 1, 0
1271 AVX_INSTR pand, 0, 0, 1
1272 AVX_INSTR pandn, 0, 0, 0
1273 AVX_INSTR pavgb, 0, 0, 1
1274 AVX_INSTR pavgw, 0, 0, 1
1275 AVX_INSTR pblendvb, 0, 0, 0
1276 AVX_INSTR pblendw, 0, 1, 0
1277 AVX_INSTR pclmulqdq, 0, 1, 0
1278 AVX_INSTR pcmpestri
1279 AVX_INSTR pcmpestrm
1280 AVX_INSTR pcmpistri
1281 AVX_INSTR pcmpistrm
1282 AVX_INSTR pcmpeqb, 0, 0, 1
1283 AVX_INSTR pcmpeqw, 0, 0, 1
1284 AVX_INSTR pcmpeqd, 0, 0, 1
1285 AVX_INSTR pcmpeqq, 0, 0, 1
1286 AVX_INSTR pcmpgtb, 0, 0, 0
1287 AVX_INSTR pcmpgtw, 0, 0, 0
1288 AVX_INSTR pcmpgtd, 0, 0, 0
1289 AVX_INSTR pcmpgtq, 0, 0, 0
1290 AVX_INSTR pextrb
1291 AVX_INSTR pextrd
1292 AVX_INSTR pextrq
1293 AVX_INSTR pextrw
1294 AVX_INSTR phaddw, 0, 0, 0
1295 AVX_INSTR phaddd, 0, 0, 0
1296 AVX_INSTR phaddsw, 0, 0, 0
1297 AVX_INSTR phminposuw
1298 AVX_INSTR phsubw, 0, 0, 0
1299 AVX_INSTR phsubd, 0, 0, 0
1300 AVX_INSTR phsubsw, 0, 0, 0
1301 AVX_INSTR pinsrb, 0, 1, 0
1302 AVX_INSTR pinsrd, 0, 1, 0
1303 AVX_INSTR pinsrq, 0, 1, 0
1304 AVX_INSTR pinsrw, 0, 1, 0
1305 AVX_INSTR pmaddwd, 0, 0, 1
1306 AVX_INSTR pmaddubsw, 0, 0, 0
1307 AVX_INSTR pmaxsb, 0, 0, 1
1308 AVX_INSTR pmaxsw, 0, 0, 1
1309 AVX_INSTR pmaxsd, 0, 0, 1
1310 AVX_INSTR pmaxub, 0, 0, 1
1311 AVX_INSTR pmaxuw, 0, 0, 1
1312 AVX_INSTR pmaxud, 0, 0, 1
1313 AVX_INSTR pminsb, 0, 0, 1
1314 AVX_INSTR pminsw, 0, 0, 1
1315 AVX_INSTR pminsd, 0, 0, 1
1316 AVX_INSTR pminub, 0, 0, 1
1317 AVX_INSTR pminuw, 0, 0, 1
1318 AVX_INSTR pminud, 0, 0, 1
1319 AVX_INSTR pmovmskb
1320 AVX_INSTR pmovsxbw
1321 AVX_INSTR pmovsxbd
1322 AVX_INSTR pmovsxbq
1323 AVX_INSTR pmovsxwd
1324 AVX_INSTR pmovsxwq
1325 AVX_INSTR pmovsxdq
1326 AVX_INSTR pmovzxbw
1327 AVX_INSTR pmovzxbd
1328 AVX_INSTR pmovzxbq
1329 AVX_INSTR pmovzxwd
1330 AVX_INSTR pmovzxwq
1331 AVX_INSTR pmovzxdq
1332 AVX_INSTR pmuldq, 0, 0, 1
1333 AVX_INSTR pmulhrsw, 0, 0, 1
1334 AVX_INSTR pmulhuw, 0, 0, 1
1335 AVX_INSTR pmulhw, 0, 0, 1
1336 AVX_INSTR pmullw, 0, 0, 1
1337 AVX_INSTR pmulld, 0, 0, 1
1338 AVX_INSTR pmuludq, 0, 0, 1
1339 AVX_INSTR por, 0, 0, 1
1340 AVX_INSTR psadbw, 0, 0, 1
1341 AVX_INSTR pshufb, 0, 0, 0
1342 AVX_INSTR pshufd
1343 AVX_INSTR pshufhw
1344 AVX_INSTR pshuflw
1345 AVX_INSTR psignb, 0, 0, 0
1346 AVX_INSTR psignw, 0, 0, 0
1347 AVX_INSTR psignd, 0, 0, 0
1348 AVX_INSTR psllw, 0, 0, 0
1349 AVX_INSTR pslld, 0, 0, 0
1350 AVX_INSTR psllq, 0, 0, 0
1351 AVX_INSTR pslldq, 0, 0, 0
1352 AVX_INSTR psraw, 0, 0, 0
1353 AVX_INSTR psrad, 0, 0, 0
1354 AVX_INSTR psrlw, 0, 0, 0
1355 AVX_INSTR psrld, 0, 0, 0
1356 AVX_INSTR psrlq, 0, 0, 0
1357 AVX_INSTR psrldq, 0, 0, 0
1358 AVX_INSTR psubb, 0, 0, 0
1359 AVX_INSTR psubw, 0, 0, 0
1360 AVX_INSTR psubd, 0, 0, 0
1361 AVX_INSTR psubq, 0, 0, 0
1362 AVX_INSTR psubsb, 0, 0, 0
1363 AVX_INSTR psubsw, 0, 0, 0
1364 AVX_INSTR psubusb, 0, 0, 0
1365 AVX_INSTR psubusw, 0, 0, 0
1366 AVX_INSTR ptest
1367 AVX_INSTR punpckhbw, 0, 0, 0
1368 AVX_INSTR punpckhwd, 0, 0, 0
1369 AVX_INSTR punpckhdq, 0, 0, 0
1370 AVX_INSTR punpckhqdq, 0, 0, 0
1371 AVX_INSTR punpcklbw, 0, 0, 0
1372 AVX_INSTR punpcklwd, 0, 0, 0
1373 AVX_INSTR punpckldq, 0, 0, 0
1374 AVX_INSTR punpcklqdq, 0, 0, 0
1375 AVX_INSTR pxor, 0, 0, 1
1376 AVX_INSTR rcpps, 1, 0, 0
1377 AVX_INSTR rcpss, 1, 0, 0
1378 AVX_INSTR roundpd
1379 AVX_INSTR roundps
1380 AVX_INSTR roundsd
1381 AVX_INSTR roundss
1382 AVX_INSTR rsqrtps, 1, 0, 0
1383 AVX_INSTR rsqrtss, 1, 0, 0
1384 AVX_INSTR shufpd, 1, 1, 0
1385 AVX_INSTR shufps, 1, 1, 0
1386 AVX_INSTR sqrtpd, 1, 0, 0
1387 AVX_INSTR sqrtps, 1, 0, 0
1388 AVX_INSTR sqrtsd, 1, 0, 0
1389 AVX_INSTR sqrtss, 1, 0, 0
1390 AVX_INSTR stmxcsr
1391 AVX_INSTR subpd, 1, 0, 0
1392 AVX_INSTR subps, 1, 0, 0
1393 AVX_INSTR subsd, 1, 0, 0
1394 AVX_INSTR subss, 1, 0, 0
1395 AVX_INSTR ucomisd
1396 AVX_INSTR ucomiss
1397 AVX_INSTR unpckhpd, 1, 0, 0
1398 AVX_INSTR unpckhps, 1, 0, 0
1399 AVX_INSTR unpcklpd, 1, 0, 0
1400 AVX_INSTR unpcklps, 1, 0, 0
1401 AVX_INSTR xorpd, 1, 0, 1
1402 AVX_INSTR xorps, 1, 0, 1
1403
1404 ; 3DNow instructions, for sharing code between AVX, SSE and 3DN
1405 AVX_INSTR pfadd, 1, 0, 1
1406 AVX_INSTR pfsub, 1, 0, 0
1407 AVX_INSTR pfmul, 1, 0, 1
1408
1409 ; base-4 constants for shuffles
1410 %assign i 0
1411 %rep 256
1412 %assign j ((i>>6)&3)*1000 + ((i>>4)&3)*100 + ((i>>2)&3)*10 + (i&3)
1413 %if j < 10
1414 CAT_XDEFINE q000, j, i
1415 %elif j < 100
1416 CAT_XDEFINE q00, j, i
1417 %elif j < 1000
1418 CAT_XDEFINE q0, j, i
1419 %else
1420 CAT_XDEFINE q, j, i
1421 %endif
1422 %assign i i+1
1423 %endrep
1424 %undef i
1425 %undef j
1426
1427 %macro FMA_INSTR 3
1428 %macro %1 4-7 %1, %2, %3
1429 %if cpuflag(xop)
1430 v%5 %1, %2, %3, %4
1431 %elifnidn %1, %4
1432 %6 %1, %2, %3
1433 %7 %1, %4
1434 %else
1435 %error non-xop emulation of ``%5 %1, %2, %3, %4'' is not supported
1436 %endif
1437 %endmacro
1438 %endmacro
1439
1440 FMA_INSTR pmacsww, pmullw, paddw
1441 FMA_INSTR pmacsdd, pmulld, paddd ; sse4 emulation
1442 FMA_INSTR pmacsdql, pmuldq, paddq ; sse4 emulation
1443 FMA_INSTR pmadcswd, pmaddwd, paddd
1444
1445 ; tzcnt is equivalent to "rep bsf" and is backwards-compatible with bsf.
1446 ; This lets us use tzcnt without bumping the yasm version requirement yet.
1447 %define tzcnt rep bsf
1448
1449 ; convert FMA4 to FMA3 if possible
1450 %macro FMA4_INSTR 4
1451 %macro %1 4-8 %1, %2, %3, %4
1452 %if cpuflag(fma4)
1453 v%5 %1, %2, %3, %4
1454 %elifidn %1, %2
1455 v%6 %1, %4, %3 ; %1 = %1 * %3 + %4
1456 %elifidn %1, %3
1457 v%7 %1, %2, %4 ; %1 = %2 * %1 + %4
1458 %elifidn %1, %4
1459 v%8 %1, %2, %3 ; %1 = %2 * %3 + %1
1460 %else
1461 %error fma3 emulation of ``%5 %1, %2, %3, %4'' is not supported
1462 %endif
1463 %endmacro
1464 %endmacro
1465
1466 FMA4_INSTR fmaddpd, fmadd132pd, fmadd213pd, fmadd231pd
1467 FMA4_INSTR fmaddps, fmadd132ps, fmadd213ps, fmadd231ps
1468 FMA4_INSTR fmaddsd, fmadd132sd, fmadd213sd, fmadd231sd
1469 FMA4_INSTR fmaddss, fmadd132ss, fmadd213ss, fmadd231ss
1470
1471 FMA4_INSTR fmaddsubpd, fmaddsub132pd, fmaddsub213pd, fmaddsub231pd
1472 FMA4_INSTR fmaddsubps, fmaddsub132ps, fmaddsub213ps, fmaddsub231ps
1473 FMA4_INSTR fmsubaddpd, fmsubadd132pd, fmsubadd213pd, fmsubadd231pd
1474 FMA4_INSTR fmsubaddps, fmsubadd132ps, fmsubadd213ps, fmsubadd231ps
1475
1476 FMA4_INSTR fmsubpd, fmsub132pd, fmsub213pd, fmsub231pd
1477 FMA4_INSTR fmsubps, fmsub132ps, fmsub213ps, fmsub231ps
1478 FMA4_INSTR fmsubsd, fmsub132sd, fmsub213sd, fmsub231sd
1479 FMA4_INSTR fmsubss, fmsub132ss, fmsub213ss, fmsub231ss
1480
1481 FMA4_INSTR fnmaddpd, fnmadd132pd, fnmadd213pd, fnmadd231pd
1482 FMA4_INSTR fnmaddps, fnmadd132ps, fnmadd213ps, fnmadd231ps
1483 FMA4_INSTR fnmaddsd, fnmadd132sd, fnmadd213sd, fnmadd231sd
1484 FMA4_INSTR fnmaddss, fnmadd132ss, fnmadd213ss, fnmadd231ss
1485
1486 FMA4_INSTR fnmsubpd, fnmsub132pd, fnmsub213pd, fnmsub231pd
1487 FMA4_INSTR fnmsubps, fnmsub132ps, fnmsub213ps, fnmsub231ps
1488 FMA4_INSTR fnmsubsd, fnmsub132sd, fnmsub213sd, fnmsub231sd
1489 FMA4_INSTR fnmsubss, fnmsub132ss, fnmsub213ss, fnmsub231ss
1490
1491 ; workaround: vpbroadcastq is broken in x86_32 due to a yasm bug
1492 %if ARCH_X86_64 == 0
1493 %macro vpbroadcastq 2
1494 %if sizeof%1 == 16
1495 movddup %1, %2
1496 %else
1497 vbroadcastsd %1, %2
1498 %endif
1499 %endmacro
1500 %endif