fc58b74e2af5698687eef31d2942f5af7bf5b801
[libav.git] / libavutil / x86 / x86inc.asm
1 ;*****************************************************************************
2 ;* x86inc.asm: x264asm abstraction layer
3 ;*****************************************************************************
4 ;* Copyright (C) 2005-2016 x264 project
5 ;*
6 ;* Authors: Loren Merritt <lorenm@u.washington.edu>
7 ;* Anton Mitrofanov <BugMaster@narod.ru>
8 ;* Fiona Glaser <fiona@x264.com>
9 ;* Henrik Gramner <henrik@gramner.com>
10 ;*
11 ;* Permission to use, copy, modify, and/or distribute this software for any
12 ;* purpose with or without fee is hereby granted, provided that the above
13 ;* copyright notice and this permission notice appear in all copies.
14 ;*
15 ;* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
16 ;* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
17 ;* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
18 ;* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
19 ;* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
20 ;* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
21 ;* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
22 ;*****************************************************************************
23
24 ; This is a header file for the x264ASM assembly language, which uses
25 ; NASM/YASM syntax combined with a large number of macros to provide easy
26 ; abstraction between different calling conventions (x86_32, win64, linux64).
27 ; It also has various other useful features to simplify writing the kind of
28 ; DSP functions that are most often used in x264.
29
30 ; Unlike the rest of x264, this file is available under an ISC license, as it
31 ; has significant usefulness outside of x264 and we want it to be available
32 ; to the largest audience possible. Of course, if you modify it for your own
33 ; purposes to add a new feature, we strongly encourage contributing a patch
34 ; as this feature might be useful for others as well. Send patches or ideas
35 ; to x264-devel@videolan.org .
36
37 %ifndef private_prefix
38 %define private_prefix x264
39 %endif
40
41 %ifndef public_prefix
42 %define public_prefix private_prefix
43 %endif
44
45 %if HAVE_ALIGNED_STACK
46 %define STACK_ALIGNMENT 16
47 %endif
48 %ifndef STACK_ALIGNMENT
49 %if ARCH_X86_64
50 %define STACK_ALIGNMENT 16
51 %else
52 %define STACK_ALIGNMENT 4
53 %endif
54 %endif
55
56 %define WIN64 0
57 %define UNIX64 0
58 %if ARCH_X86_64
59 %ifidn __OUTPUT_FORMAT__,win32
60 %define WIN64 1
61 %elifidn __OUTPUT_FORMAT__,win64
62 %define WIN64 1
63 %elifidn __OUTPUT_FORMAT__,x64
64 %define WIN64 1
65 %else
66 %define UNIX64 1
67 %endif
68 %endif
69
70 %define FORMAT_ELF 0
71 %ifidn __OUTPUT_FORMAT__,elf
72 %define FORMAT_ELF 1
73 %elifidn __OUTPUT_FORMAT__,elf32
74 %define FORMAT_ELF 1
75 %elifidn __OUTPUT_FORMAT__,elf64
76 %define FORMAT_ELF 1
77 %endif
78
79 %ifdef PREFIX
80 %define mangle(x) _ %+ x
81 %else
82 %define mangle(x) x
83 %endif
84
85 ; aout does not support align=
86 ; NOTE: This section is out of sync with x264, in order to
87 ; keep supporting OS/2.
88 %macro SECTION_RODATA 0-1 16
89 %ifidn __OUTPUT_FORMAT__,aout
90 section .text
91 %else
92 SECTION .rodata align=%1
93 %endif
94 %endmacro
95
96 %if WIN64
97 %define PIC
98 %elif ARCH_X86_64 == 0
99 ; x86_32 doesn't require PIC.
100 ; Some distros prefer shared objects to be PIC, but nothing breaks if
101 ; the code contains a few textrels, so we'll skip that complexity.
102 %undef PIC
103 %endif
104 %ifdef PIC
105 default rel
106 %endif
107
108 %macro CPUNOP 1
109 %if HAVE_CPUNOP
110 CPU %1
111 %endif
112 %endmacro
113
114 ; Macros to eliminate most code duplication between x86_32 and x86_64:
115 ; Currently this works only for leaf functions which load all their arguments
116 ; into registers at the start, and make no other use of the stack. Luckily that
117 ; covers most of x264's asm.
118
119 ; PROLOGUE:
120 ; %1 = number of arguments. loads them from stack if needed.
121 ; %2 = number of registers used. pushes callee-saved regs if needed.
122 ; %3 = number of xmm registers used. pushes callee-saved xmm regs if needed.
123 ; %4 = (optional) stack size to be allocated. The stack will be aligned before
124 ; allocating the specified stack size. If the required stack alignment is
125 ; larger than the known stack alignment the stack will be manually aligned
126 ; and an extra register will be allocated to hold the original stack
127 ; pointer (to not invalidate r0m etc.). To prevent the use of an extra
128 ; register as stack pointer, request a negative stack size.
129 ; %4+/%5+ = list of names to define to registers
130 ; PROLOGUE can also be invoked by adding the same options to cglobal
131
132 ; e.g.
133 ; cglobal foo, 2,3,7,0x40, dst, src, tmp
134 ; declares a function (foo) that automatically loads two arguments (dst and
135 ; src) into registers, uses one additional register (tmp) plus 7 vector
136 ; registers (m0-m6) and allocates 0x40 bytes of stack space.
137
138 ; TODO Some functions can use some args directly from the stack. If they're the
139 ; last args then you can just not declare them, but if they're in the middle
140 ; we need more flexible macro.
141
142 ; RET:
143 ; Pops anything that was pushed by PROLOGUE, and returns.
144
145 ; REP_RET:
146 ; Use this instead of RET if it's a branch target.
147
148 ; registers:
149 ; rN and rNq are the native-size register holding function argument N
150 ; rNd, rNw, rNb are dword, word, and byte size
151 ; rNh is the high 8 bits of the word size
152 ; rNm is the original location of arg N (a register or on the stack), dword
153 ; rNmp is native size
154
155 %macro DECLARE_REG 2-3
156 %define r%1q %2
157 %define r%1d %2d
158 %define r%1w %2w
159 %define r%1b %2b
160 %define r%1h %2h
161 %define %2q %2
162 %if %0 == 2
163 %define r%1m %2d
164 %define r%1mp %2
165 %elif ARCH_X86_64 ; memory
166 %define r%1m [rstk + stack_offset + %3]
167 %define r%1mp qword r %+ %1 %+ m
168 %else
169 %define r%1m [rstk + stack_offset + %3]
170 %define r%1mp dword r %+ %1 %+ m
171 %endif
172 %define r%1 %2
173 %endmacro
174
175 %macro DECLARE_REG_SIZE 3
176 %define r%1q r%1
177 %define e%1q r%1
178 %define r%1d e%1
179 %define e%1d e%1
180 %define r%1w %1
181 %define e%1w %1
182 %define r%1h %3
183 %define e%1h %3
184 %define r%1b %2
185 %define e%1b %2
186 %if ARCH_X86_64 == 0
187 %define r%1 e%1
188 %endif
189 %endmacro
190
191 DECLARE_REG_SIZE ax, al, ah
192 DECLARE_REG_SIZE bx, bl, bh
193 DECLARE_REG_SIZE cx, cl, ch
194 DECLARE_REG_SIZE dx, dl, dh
195 DECLARE_REG_SIZE si, sil, null
196 DECLARE_REG_SIZE di, dil, null
197 DECLARE_REG_SIZE bp, bpl, null
198
199 ; t# defines for when per-arch register allocation is more complex than just function arguments
200
201 %macro DECLARE_REG_TMP 1-*
202 %assign %%i 0
203 %rep %0
204 CAT_XDEFINE t, %%i, r%1
205 %assign %%i %%i+1
206 %rotate 1
207 %endrep
208 %endmacro
209
210 %macro DECLARE_REG_TMP_SIZE 0-*
211 %rep %0
212 %define t%1q t%1 %+ q
213 %define t%1d t%1 %+ d
214 %define t%1w t%1 %+ w
215 %define t%1h t%1 %+ h
216 %define t%1b t%1 %+ b
217 %rotate 1
218 %endrep
219 %endmacro
220
221 DECLARE_REG_TMP_SIZE 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14
222
223 %if ARCH_X86_64
224 %define gprsize 8
225 %else
226 %define gprsize 4
227 %endif
228
229 %macro PUSH 1
230 push %1
231 %ifidn rstk, rsp
232 %assign stack_offset stack_offset+gprsize
233 %endif
234 %endmacro
235
236 %macro POP 1
237 pop %1
238 %ifidn rstk, rsp
239 %assign stack_offset stack_offset-gprsize
240 %endif
241 %endmacro
242
243 %macro PUSH_IF_USED 1-*
244 %rep %0
245 %if %1 < regs_used
246 PUSH r%1
247 %endif
248 %rotate 1
249 %endrep
250 %endmacro
251
252 %macro POP_IF_USED 1-*
253 %rep %0
254 %if %1 < regs_used
255 pop r%1
256 %endif
257 %rotate 1
258 %endrep
259 %endmacro
260
261 %macro LOAD_IF_USED 1-*
262 %rep %0
263 %if %1 < num_args
264 mov r%1, r %+ %1 %+ mp
265 %endif
266 %rotate 1
267 %endrep
268 %endmacro
269
270 %macro SUB 2
271 sub %1, %2
272 %ifidn %1, rstk
273 %assign stack_offset stack_offset+(%2)
274 %endif
275 %endmacro
276
277 %macro ADD 2
278 add %1, %2
279 %ifidn %1, rstk
280 %assign stack_offset stack_offset-(%2)
281 %endif
282 %endmacro
283
284 %macro movifnidn 2
285 %ifnidn %1, %2
286 mov %1, %2
287 %endif
288 %endmacro
289
290 %macro movsxdifnidn 2
291 %ifnidn %1, %2
292 movsxd %1, %2
293 %endif
294 %endmacro
295
296 %macro ASSERT 1
297 %if (%1) == 0
298 %error assertion ``%1'' failed
299 %endif
300 %endmacro
301
302 %macro DEFINE_ARGS 0-*
303 %ifdef n_arg_names
304 %assign %%i 0
305 %rep n_arg_names
306 CAT_UNDEF arg_name %+ %%i, q
307 CAT_UNDEF arg_name %+ %%i, d
308 CAT_UNDEF arg_name %+ %%i, w
309 CAT_UNDEF arg_name %+ %%i, h
310 CAT_UNDEF arg_name %+ %%i, b
311 CAT_UNDEF arg_name %+ %%i, m
312 CAT_UNDEF arg_name %+ %%i, mp
313 CAT_UNDEF arg_name, %%i
314 %assign %%i %%i+1
315 %endrep
316 %endif
317
318 %xdefine %%stack_offset stack_offset
319 %undef stack_offset ; so that the current value of stack_offset doesn't get baked in by xdefine
320 %assign %%i 0
321 %rep %0
322 %xdefine %1q r %+ %%i %+ q
323 %xdefine %1d r %+ %%i %+ d
324 %xdefine %1w r %+ %%i %+ w
325 %xdefine %1h r %+ %%i %+ h
326 %xdefine %1b r %+ %%i %+ b
327 %xdefine %1m r %+ %%i %+ m
328 %xdefine %1mp r %+ %%i %+ mp
329 CAT_XDEFINE arg_name, %%i, %1
330 %assign %%i %%i+1
331 %rotate 1
332 %endrep
333 %xdefine stack_offset %%stack_offset
334 %assign n_arg_names %0
335 %endmacro
336
337 %define required_stack_alignment ((mmsize + 15) & ~15)
338
339 %macro ALLOC_STACK 1-2 0 ; stack_size, n_xmm_regs (for win64 only)
340 %ifnum %1
341 %if %1 != 0
342 %assign %%pad 0
343 %assign stack_size %1
344 %if stack_size < 0
345 %assign stack_size -stack_size
346 %endif
347 %if WIN64
348 %assign %%pad %%pad + 32 ; shadow space
349 %if mmsize != 8
350 %assign xmm_regs_used %2
351 %if xmm_regs_used > 8
352 %assign %%pad %%pad + (xmm_regs_used-8)*16 ; callee-saved xmm registers
353 %endif
354 %endif
355 %endif
356 %if required_stack_alignment <= STACK_ALIGNMENT
357 ; maintain the current stack alignment
358 %assign stack_size_padded stack_size + %%pad + ((-%%pad-stack_offset-gprsize) & (STACK_ALIGNMENT-1))
359 SUB rsp, stack_size_padded
360 %else
361 %assign %%reg_num (regs_used - 1)
362 %xdefine rstk r %+ %%reg_num
363 ; align stack, and save original stack location directly above
364 ; it, i.e. in [rsp+stack_size_padded], so we can restore the
365 ; stack in a single instruction (i.e. mov rsp, rstk or mov
366 ; rsp, [rsp+stack_size_padded])
367 %if %1 < 0 ; need to store rsp on stack
368 %xdefine rstkm [rsp + stack_size + %%pad]
369 %assign %%pad %%pad + gprsize
370 %else ; can keep rsp in rstk during whole function
371 %xdefine rstkm rstk
372 %endif
373 %assign stack_size_padded stack_size + ((%%pad + required_stack_alignment-1) & ~(required_stack_alignment-1))
374 mov rstk, rsp
375 and rsp, ~(required_stack_alignment-1)
376 sub rsp, stack_size_padded
377 movifnidn rstkm, rstk
378 %endif
379 WIN64_PUSH_XMM
380 %endif
381 %endif
382 %endmacro
383
384 %macro SETUP_STACK_POINTER 1
385 %ifnum %1
386 %if %1 != 0 && required_stack_alignment > STACK_ALIGNMENT
387 %if %1 > 0
388 %assign regs_used (regs_used + 1)
389 %elif ARCH_X86_64 && regs_used == num_args && num_args <= 4 + UNIX64 * 2
390 %warning "Stack pointer will overwrite register argument"
391 %endif
392 %endif
393 %endif
394 %endmacro
395
396 %macro DEFINE_ARGS_INTERNAL 3+
397 %ifnum %2
398 DEFINE_ARGS %3
399 %elif %1 == 4
400 DEFINE_ARGS %2
401 %elif %1 > 4
402 DEFINE_ARGS %2, %3
403 %endif
404 %endmacro
405
406 %if WIN64 ; Windows x64 ;=================================================
407
408 DECLARE_REG 0, rcx
409 DECLARE_REG 1, rdx
410 DECLARE_REG 2, R8
411 DECLARE_REG 3, R9
412 DECLARE_REG 4, R10, 40
413 DECLARE_REG 5, R11, 48
414 DECLARE_REG 6, rax, 56
415 DECLARE_REG 7, rdi, 64
416 DECLARE_REG 8, rsi, 72
417 DECLARE_REG 9, rbx, 80
418 DECLARE_REG 10, rbp, 88
419 DECLARE_REG 11, R12, 96
420 DECLARE_REG 12, R13, 104
421 DECLARE_REG 13, R14, 112
422 DECLARE_REG 14, R15, 120
423
424 %macro PROLOGUE 2-5+ 0 ; #args, #regs, #xmm_regs, [stack_size,] arg_names...
425 %assign num_args %1
426 %assign regs_used %2
427 ASSERT regs_used >= num_args
428 SETUP_STACK_POINTER %4
429 ASSERT regs_used <= 15
430 PUSH_IF_USED 7, 8, 9, 10, 11, 12, 13, 14
431 ALLOC_STACK %4, %3
432 %if mmsize != 8 && stack_size == 0
433 WIN64_SPILL_XMM %3
434 %endif
435 LOAD_IF_USED 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
436 DEFINE_ARGS_INTERNAL %0, %4, %5
437 %endmacro
438
439 %macro WIN64_PUSH_XMM 0
440 ; Use the shadow space to store XMM6 and XMM7, the rest needs stack space allocated.
441 %if xmm_regs_used > 6
442 movaps [rstk + stack_offset + 8], xmm6
443 %endif
444 %if xmm_regs_used > 7
445 movaps [rstk + stack_offset + 24], xmm7
446 %endif
447 %if xmm_regs_used > 8
448 %assign %%i 8
449 %rep xmm_regs_used-8
450 movaps [rsp + (%%i-8)*16 + stack_size + 32], xmm %+ %%i
451 %assign %%i %%i+1
452 %endrep
453 %endif
454 %endmacro
455
456 %macro WIN64_SPILL_XMM 1
457 %assign xmm_regs_used %1
458 ASSERT xmm_regs_used <= 16
459 %if xmm_regs_used > 8
460 ; Allocate stack space for callee-saved xmm registers plus shadow space and align the stack.
461 %assign %%pad (xmm_regs_used-8)*16 + 32
462 %assign stack_size_padded %%pad + ((-%%pad-stack_offset-gprsize) & (STACK_ALIGNMENT-1))
463 SUB rsp, stack_size_padded
464 %endif
465 WIN64_PUSH_XMM
466 %endmacro
467
468 %macro WIN64_RESTORE_XMM_INTERNAL 1
469 %assign %%pad_size 0
470 %if xmm_regs_used > 8
471 %assign %%i xmm_regs_used
472 %rep xmm_regs_used-8
473 %assign %%i %%i-1
474 movaps xmm %+ %%i, [%1 + (%%i-8)*16 + stack_size + 32]
475 %endrep
476 %endif
477 %if stack_size_padded > 0
478 %if stack_size > 0 && required_stack_alignment > STACK_ALIGNMENT
479 mov rsp, rstkm
480 %else
481 add %1, stack_size_padded
482 %assign %%pad_size stack_size_padded
483 %endif
484 %endif
485 %if xmm_regs_used > 7
486 movaps xmm7, [%1 + stack_offset - %%pad_size + 24]
487 %endif
488 %if xmm_regs_used > 6
489 movaps xmm6, [%1 + stack_offset - %%pad_size + 8]
490 %endif
491 %endmacro
492
493 %macro WIN64_RESTORE_XMM 1
494 WIN64_RESTORE_XMM_INTERNAL %1
495 %assign stack_offset (stack_offset-stack_size_padded)
496 %assign xmm_regs_used 0
497 %endmacro
498
499 %define has_epilogue regs_used > 7 || xmm_regs_used > 6 || mmsize == 32 || stack_size > 0
500
501 %macro RET 0
502 WIN64_RESTORE_XMM_INTERNAL rsp
503 POP_IF_USED 14, 13, 12, 11, 10, 9, 8, 7
504 %if mmsize == 32
505 vzeroupper
506 %endif
507 AUTO_REP_RET
508 %endmacro
509
510 %elif ARCH_X86_64 ; *nix x64 ;=============================================
511
512 DECLARE_REG 0, rdi
513 DECLARE_REG 1, rsi
514 DECLARE_REG 2, rdx
515 DECLARE_REG 3, rcx
516 DECLARE_REG 4, R8
517 DECLARE_REG 5, R9
518 DECLARE_REG 6, rax, 8
519 DECLARE_REG 7, R10, 16
520 DECLARE_REG 8, R11, 24
521 DECLARE_REG 9, rbx, 32
522 DECLARE_REG 10, rbp, 40
523 DECLARE_REG 11, R12, 48
524 DECLARE_REG 12, R13, 56
525 DECLARE_REG 13, R14, 64
526 DECLARE_REG 14, R15, 72
527
528 %macro PROLOGUE 2-5+ ; #args, #regs, #xmm_regs, [stack_size,] arg_names...
529 %assign num_args %1
530 %assign regs_used %2
531 ASSERT regs_used >= num_args
532 SETUP_STACK_POINTER %4
533 ASSERT regs_used <= 15
534 PUSH_IF_USED 9, 10, 11, 12, 13, 14
535 ALLOC_STACK %4
536 LOAD_IF_USED 6, 7, 8, 9, 10, 11, 12, 13, 14
537 DEFINE_ARGS_INTERNAL %0, %4, %5
538 %endmacro
539
540 %define has_epilogue regs_used > 9 || mmsize == 32 || stack_size > 0
541
542 %macro RET 0
543 %if stack_size_padded > 0
544 %if required_stack_alignment > STACK_ALIGNMENT
545 mov rsp, rstkm
546 %else
547 add rsp, stack_size_padded
548 %endif
549 %endif
550 POP_IF_USED 14, 13, 12, 11, 10, 9
551 %if mmsize == 32
552 vzeroupper
553 %endif
554 AUTO_REP_RET
555 %endmacro
556
557 %else ; X86_32 ;==============================================================
558
559 DECLARE_REG 0, eax, 4
560 DECLARE_REG 1, ecx, 8
561 DECLARE_REG 2, edx, 12
562 DECLARE_REG 3, ebx, 16
563 DECLARE_REG 4, esi, 20
564 DECLARE_REG 5, edi, 24
565 DECLARE_REG 6, ebp, 28
566 %define rsp esp
567
568 %macro DECLARE_ARG 1-*
569 %rep %0
570 %define r%1m [rstk + stack_offset + 4*%1 + 4]
571 %define r%1mp dword r%1m
572 %rotate 1
573 %endrep
574 %endmacro
575
576 DECLARE_ARG 7, 8, 9, 10, 11, 12, 13, 14
577
578 %macro PROLOGUE 2-5+ ; #args, #regs, #xmm_regs, [stack_size,] arg_names...
579 %assign num_args %1
580 %assign regs_used %2
581 ASSERT regs_used >= num_args
582 %if num_args > 7
583 %assign num_args 7
584 %endif
585 %if regs_used > 7
586 %assign regs_used 7
587 %endif
588 SETUP_STACK_POINTER %4
589 ASSERT regs_used <= 7
590 PUSH_IF_USED 3, 4, 5, 6
591 ALLOC_STACK %4
592 LOAD_IF_USED 0, 1, 2, 3, 4, 5, 6
593 DEFINE_ARGS_INTERNAL %0, %4, %5
594 %endmacro
595
596 %define has_epilogue regs_used > 3 || mmsize == 32 || stack_size > 0
597
598 %macro RET 0
599 %if stack_size_padded > 0
600 %if required_stack_alignment > STACK_ALIGNMENT
601 mov rsp, rstkm
602 %else
603 add rsp, stack_size_padded
604 %endif
605 %endif
606 POP_IF_USED 6, 5, 4, 3
607 %if mmsize == 32
608 vzeroupper
609 %endif
610 AUTO_REP_RET
611 %endmacro
612
613 %endif ;======================================================================
614
615 %if WIN64 == 0
616 %macro WIN64_SPILL_XMM 1
617 %endmacro
618 %macro WIN64_RESTORE_XMM 1
619 %endmacro
620 %macro WIN64_PUSH_XMM 0
621 %endmacro
622 %endif
623
624 ; On AMD cpus <=K10, an ordinary ret is slow if it immediately follows either
625 ; a branch or a branch target. So switch to a 2-byte form of ret in that case.
626 ; We can automatically detect "follows a branch", but not a branch target.
627 ; (SSSE3 is a sufficient condition to know that your cpu doesn't have this problem.)
628 %macro REP_RET 0
629 %if has_epilogue
630 RET
631 %else
632 rep ret
633 %endif
634 %endmacro
635
636 %define last_branch_adr $$
637 %macro AUTO_REP_RET 0
638 %ifndef cpuflags
639 times ((last_branch_adr-$)>>31)+1 rep ; times 1 iff $ != last_branch_adr.
640 %elif notcpuflag(ssse3)
641 times ((last_branch_adr-$)>>31)+1 rep
642 %endif
643 ret
644 %endmacro
645
646 %macro BRANCH_INSTR 0-*
647 %rep %0
648 %macro %1 1-2 %1
649 %2 %1
650 %%branch_instr:
651 %xdefine last_branch_adr %%branch_instr
652 %endmacro
653 %rotate 1
654 %endrep
655 %endmacro
656
657 BRANCH_INSTR jz, je, jnz, jne, jl, jle, jnl, jnle, jg, jge, jng, jnge, ja, jae, jna, jnae, jb, jbe, jnb, jnbe, jc, jnc, js, jns, jo, jno, jp, jnp
658
659 %macro TAIL_CALL 2 ; callee, is_nonadjacent
660 %if has_epilogue
661 call %1
662 RET
663 %elif %2
664 jmp %1
665 %endif
666 %endmacro
667
668 ;=============================================================================
669 ; arch-independent part
670 ;=============================================================================
671
672 %assign function_align 16
673
674 ; Begin a function.
675 ; Applies any symbol mangling needed for C linkage, and sets up a define such that
676 ; subsequent uses of the function name automatically refer to the mangled version.
677 ; Appends cpuflags to the function name if cpuflags has been specified.
678 ; The "" empty default parameter is a workaround for nasm, which fails if SUFFIX
679 ; is empty and we call cglobal_internal with just %1 %+ SUFFIX (without %2).
680 %macro cglobal 1-2+ "" ; name, [PROLOGUE args]
681 cglobal_internal 1, %1 %+ SUFFIX, %2
682 %endmacro
683 %macro cvisible 1-2+ "" ; name, [PROLOGUE args]
684 cglobal_internal 0, %1 %+ SUFFIX, %2
685 %endmacro
686 %macro cglobal_internal 2-3+
687 %if %1
688 %xdefine %%FUNCTION_PREFIX private_prefix
689 %xdefine %%VISIBILITY hidden
690 %else
691 %xdefine %%FUNCTION_PREFIX public_prefix
692 %xdefine %%VISIBILITY
693 %endif
694 %ifndef cglobaled_%2
695 %xdefine %2 mangle(%%FUNCTION_PREFIX %+ _ %+ %2)
696 %xdefine %2.skip_prologue %2 %+ .skip_prologue
697 CAT_XDEFINE cglobaled_, %2, 1
698 %endif
699 %xdefine current_function %2
700 %if FORMAT_ELF
701 global %2:function %%VISIBILITY
702 %else
703 global %2
704 %endif
705 align function_align
706 %2:
707 RESET_MM_PERMUTATION ; needed for x86-64, also makes disassembly somewhat nicer
708 %xdefine rstk rsp ; copy of the original stack pointer, used when greater alignment than the known stack alignment is required
709 %assign stack_offset 0 ; stack pointer offset relative to the return address
710 %assign stack_size 0 ; amount of stack space that can be freely used inside a function
711 %assign stack_size_padded 0 ; total amount of allocated stack space, including space for callee-saved xmm registers on WIN64 and alignment padding
712 %assign xmm_regs_used 0 ; number of XMM registers requested, used for dealing with callee-saved registers on WIN64
713 %ifnidn %3, ""
714 PROLOGUE %3
715 %endif
716 %endmacro
717
718 %macro cextern 1
719 %xdefine %1 mangle(private_prefix %+ _ %+ %1)
720 CAT_XDEFINE cglobaled_, %1, 1
721 extern %1
722 %endmacro
723
724 ; like cextern, but without the prefix
725 %macro cextern_naked 1
726 %ifdef PREFIX
727 %xdefine %1 mangle(%1)
728 %endif
729 CAT_XDEFINE cglobaled_, %1, 1
730 extern %1
731 %endmacro
732
733 %macro const 1-2+
734 %xdefine %1 mangle(private_prefix %+ _ %+ %1)
735 %if FORMAT_ELF
736 global %1:data hidden
737 %else
738 global %1
739 %endif
740 %1: %2
741 %endmacro
742
743 ; This is needed for ELF, otherwise the GNU linker assumes the stack is executable by default.
744 %if FORMAT_ELF
745 [SECTION .note.GNU-stack noalloc noexec nowrite progbits]
746 %endif
747
748 ; cpuflags
749
750 %assign cpuflags_mmx (1<<0)
751 %assign cpuflags_mmx2 (1<<1) | cpuflags_mmx
752 %assign cpuflags_3dnow (1<<2) | cpuflags_mmx
753 %assign cpuflags_3dnowext (1<<3) | cpuflags_3dnow
754 %assign cpuflags_sse (1<<4) | cpuflags_mmx2
755 %assign cpuflags_sse2 (1<<5) | cpuflags_sse
756 %assign cpuflags_sse2slow (1<<6) | cpuflags_sse2
757 %assign cpuflags_sse3 (1<<7) | cpuflags_sse2
758 %assign cpuflags_ssse3 (1<<8) | cpuflags_sse3
759 %assign cpuflags_sse4 (1<<9) | cpuflags_ssse3
760 %assign cpuflags_sse42 (1<<10)| cpuflags_sse4
761 %assign cpuflags_avx (1<<11)| cpuflags_sse42
762 %assign cpuflags_xop (1<<12)| cpuflags_avx
763 %assign cpuflags_fma4 (1<<13)| cpuflags_avx
764 %assign cpuflags_fma3 (1<<14)| cpuflags_avx
765 %assign cpuflags_avx2 (1<<15)| cpuflags_fma3
766
767 %assign cpuflags_cache32 (1<<16)
768 %assign cpuflags_cache64 (1<<17)
769 %assign cpuflags_slowctz (1<<18)
770 %assign cpuflags_lzcnt (1<<19)
771 %assign cpuflags_aligned (1<<20) ; not a cpu feature, but a function variant
772 %assign cpuflags_atom (1<<21)
773 %assign cpuflags_bmi1 (1<<22)|cpuflags_lzcnt
774 %assign cpuflags_bmi2 (1<<23)|cpuflags_bmi1
775
776 ; Returns a boolean value expressing whether or not the specified cpuflag is enabled.
777 %define cpuflag(x) (((((cpuflags & (cpuflags_ %+ x)) ^ (cpuflags_ %+ x)) - 1) >> 31) & 1)
778 %define notcpuflag(x) (cpuflag(x) ^ 1)
779
780 ; Takes an arbitrary number of cpuflags from the above list.
781 ; All subsequent functions (up to the next INIT_CPUFLAGS) is built for the specified cpu.
782 ; You shouldn't need to invoke this macro directly, it's a subroutine for INIT_MMX &co.
783 %macro INIT_CPUFLAGS 0-*
784 %xdefine SUFFIX
785 %undef cpuname
786 %assign cpuflags 0
787
788 %if %0 >= 1
789 %rep %0
790 %ifdef cpuname
791 %xdefine cpuname cpuname %+ _%1
792 %else
793 %xdefine cpuname %1
794 %endif
795 %assign cpuflags cpuflags | cpuflags_%1
796 %rotate 1
797 %endrep
798 %xdefine SUFFIX _ %+ cpuname
799
800 %if cpuflag(avx)
801 %assign avx_enabled 1
802 %endif
803 %if (mmsize == 16 && notcpuflag(sse2)) || (mmsize == 32 && notcpuflag(avx2))
804 %define mova movaps
805 %define movu movups
806 %define movnta movntps
807 %endif
808 %if cpuflag(aligned)
809 %define movu mova
810 %elif cpuflag(sse3) && notcpuflag(ssse3)
811 %define movu lddqu
812 %endif
813 %endif
814
815 %if ARCH_X86_64 || cpuflag(sse2)
816 CPUNOP amdnop
817 %else
818 CPUNOP basicnop
819 %endif
820 %endmacro
821
822 ; Merge mmx and sse*
823 ; m# is a simd register of the currently selected size
824 ; xm# is the corresponding xmm register if mmsize >= 16, otherwise the same as m#
825 ; ym# is the corresponding ymm register if mmsize >= 32, otherwise the same as m#
826 ; (All 3 remain in sync through SWAP.)
827
828 %macro CAT_XDEFINE 3
829 %xdefine %1%2 %3
830 %endmacro
831
832 %macro CAT_UNDEF 2
833 %undef %1%2
834 %endmacro
835
836 %macro INIT_MMX 0-1+
837 %assign avx_enabled 0
838 %define RESET_MM_PERMUTATION INIT_MMX %1
839 %define mmsize 8
840 %define num_mmregs 8
841 %define mova movq
842 %define movu movq
843 %define movh movd
844 %define movnta movntq
845 %assign %%i 0
846 %rep 8
847 CAT_XDEFINE m, %%i, mm %+ %%i
848 CAT_XDEFINE nnmm, %%i, %%i
849 %assign %%i %%i+1
850 %endrep
851 %rep 8
852 CAT_UNDEF m, %%i
853 CAT_UNDEF nnmm, %%i
854 %assign %%i %%i+1
855 %endrep
856 INIT_CPUFLAGS %1
857 %endmacro
858
859 %macro INIT_XMM 0-1+
860 %assign avx_enabled 0
861 %define RESET_MM_PERMUTATION INIT_XMM %1
862 %define mmsize 16
863 %define num_mmregs 8
864 %if ARCH_X86_64
865 %define num_mmregs 16
866 %endif
867 %define mova movdqa
868 %define movu movdqu
869 %define movh movq
870 %define movnta movntdq
871 %assign %%i 0
872 %rep num_mmregs
873 CAT_XDEFINE m, %%i, xmm %+ %%i
874 CAT_XDEFINE nnxmm, %%i, %%i
875 %assign %%i %%i+1
876 %endrep
877 INIT_CPUFLAGS %1
878 %endmacro
879
880 %macro INIT_YMM 0-1+
881 %assign avx_enabled 1
882 %define RESET_MM_PERMUTATION INIT_YMM %1
883 %define mmsize 32
884 %define num_mmregs 8
885 %if ARCH_X86_64
886 %define num_mmregs 16
887 %endif
888 %define mova movdqa
889 %define movu movdqu
890 %undef movh
891 %define movnta movntdq
892 %assign %%i 0
893 %rep num_mmregs
894 CAT_XDEFINE m, %%i, ymm %+ %%i
895 CAT_XDEFINE nnymm, %%i, %%i
896 %assign %%i %%i+1
897 %endrep
898 INIT_CPUFLAGS %1
899 %endmacro
900
901 INIT_XMM
902
903 %macro DECLARE_MMCAST 1
904 %define mmmm%1 mm%1
905 %define mmxmm%1 mm%1
906 %define mmymm%1 mm%1
907 %define xmmmm%1 mm%1
908 %define xmmxmm%1 xmm%1
909 %define xmmymm%1 xmm%1
910 %define ymmmm%1 mm%1
911 %define ymmxmm%1 xmm%1
912 %define ymmymm%1 ymm%1
913 %define xm%1 xmm %+ m%1
914 %define ym%1 ymm %+ m%1
915 %endmacro
916
917 %assign i 0
918 %rep 16
919 DECLARE_MMCAST i
920 %assign i i+1
921 %endrep
922
923 ; I often want to use macros that permute their arguments. e.g. there's no
924 ; efficient way to implement butterfly or transpose or dct without swapping some
925 ; arguments.
926 ;
927 ; I would like to not have to manually keep track of the permutations:
928 ; If I insert a permutation in the middle of a function, it should automatically
929 ; change everything that follows. For more complex macros I may also have multiple
930 ; implementations, e.g. the SSE2 and SSSE3 versions may have different permutations.
931 ;
932 ; Hence these macros. Insert a PERMUTE or some SWAPs at the end of a macro that
933 ; permutes its arguments. It's equivalent to exchanging the contents of the
934 ; registers, except that this way you exchange the register names instead, so it
935 ; doesn't cost any cycles.
936
937 %macro PERMUTE 2-* ; takes a list of pairs to swap
938 %rep %0/2
939 %xdefine %%tmp%2 m%2
940 %rotate 2
941 %endrep
942 %rep %0/2
943 %xdefine m%1 %%tmp%2
944 CAT_XDEFINE nn, m%1, %1
945 %rotate 2
946 %endrep
947 %endmacro
948
949 %macro SWAP 2+ ; swaps a single chain (sometimes more concise than pairs)
950 %ifnum %1 ; SWAP 0, 1, ...
951 SWAP_INTERNAL_NUM %1, %2
952 %else ; SWAP m0, m1, ...
953 SWAP_INTERNAL_NAME %1, %2
954 %endif
955 %endmacro
956
957 %macro SWAP_INTERNAL_NUM 2-*
958 %rep %0-1
959 %xdefine %%tmp m%1
960 %xdefine m%1 m%2
961 %xdefine m%2 %%tmp
962 CAT_XDEFINE nn, m%1, %1
963 CAT_XDEFINE nn, m%2, %2
964 %rotate 1
965 %endrep
966 %endmacro
967
968 %macro SWAP_INTERNAL_NAME 2-*
969 %xdefine %%args nn %+ %1
970 %rep %0-1
971 %xdefine %%args %%args, nn %+ %2
972 %rotate 1
973 %endrep
974 SWAP_INTERNAL_NUM %%args
975 %endmacro
976
977 ; If SAVE_MM_PERMUTATION is placed at the end of a function, then any later
978 ; calls to that function will automatically load the permutation, so values can
979 ; be returned in mmregs.
980 %macro SAVE_MM_PERMUTATION 0-1
981 %if %0
982 %xdefine %%f %1_m
983 %else
984 %xdefine %%f current_function %+ _m
985 %endif
986 %assign %%i 0
987 %rep num_mmregs
988 CAT_XDEFINE %%f, %%i, m %+ %%i
989 %assign %%i %%i+1
990 %endrep
991 %endmacro
992
993 %macro LOAD_MM_PERMUTATION 1 ; name to load from
994 %ifdef %1_m0
995 %assign %%i 0
996 %rep num_mmregs
997 CAT_XDEFINE m, %%i, %1_m %+ %%i
998 CAT_XDEFINE nn, m %+ %%i, %%i
999 %assign %%i %%i+1
1000 %endrep
1001 %endif
1002 %endmacro
1003
1004 ; Append cpuflags to the callee's name iff the appended name is known and the plain name isn't
1005 %macro call 1
1006 call_internal %1 %+ SUFFIX, %1
1007 %endmacro
1008 %macro call_internal 2
1009 %xdefine %%i %2
1010 %ifndef cglobaled_%2
1011 %ifdef cglobaled_%1
1012 %xdefine %%i %1
1013 %endif
1014 %endif
1015 call %%i
1016 LOAD_MM_PERMUTATION %%i
1017 %endmacro
1018
1019 ; Substitutions that reduce instruction size but are functionally equivalent
1020 %macro add 2
1021 %ifnum %2
1022 %if %2==128
1023 sub %1, -128
1024 %else
1025 add %1, %2
1026 %endif
1027 %else
1028 add %1, %2
1029 %endif
1030 %endmacro
1031
1032 %macro sub 2
1033 %ifnum %2
1034 %if %2==128
1035 add %1, -128
1036 %else
1037 sub %1, %2
1038 %endif
1039 %else
1040 sub %1, %2
1041 %endif
1042 %endmacro
1043
1044 ;=============================================================================
1045 ; AVX abstraction layer
1046 ;=============================================================================
1047
1048 %assign i 0
1049 %rep 16
1050 %if i < 8
1051 CAT_XDEFINE sizeofmm, i, 8
1052 %endif
1053 CAT_XDEFINE sizeofxmm, i, 16
1054 CAT_XDEFINE sizeofymm, i, 32
1055 %assign i i+1
1056 %endrep
1057 %undef i
1058
1059 %macro CHECK_AVX_INSTR_EMU 3-*
1060 %xdefine %%opcode %1
1061 %xdefine %%dst %2
1062 %rep %0-2
1063 %ifidn %%dst, %3
1064 %error non-avx emulation of ``%%opcode'' is not supported
1065 %endif
1066 %rotate 1
1067 %endrep
1068 %endmacro
1069
1070 ;%1 == instruction
1071 ;%2 == minimal instruction set
1072 ;%3 == 1 if float, 0 if int
1073 ;%4 == 1 if non-destructive or 4-operand (xmm, xmm, xmm, imm), 0 otherwise
1074 ;%5 == 1 if commutative (i.e. doesn't matter which src arg is which), 0 if not
1075 ;%6+: operands
1076 %macro RUN_AVX_INSTR 6-9+
1077 %ifnum sizeof%7
1078 %assign __sizeofreg sizeof%7
1079 %elifnum sizeof%6
1080 %assign __sizeofreg sizeof%6
1081 %else
1082 %assign __sizeofreg mmsize
1083 %endif
1084 %assign __emulate_avx 0
1085 %if avx_enabled && __sizeofreg >= 16
1086 %xdefine __instr v%1
1087 %else
1088 %xdefine __instr %1
1089 %if %0 >= 8+%4
1090 %assign __emulate_avx 1
1091 %endif
1092 %endif
1093 %ifnidn %2, fnord
1094 %ifdef cpuname
1095 %if notcpuflag(%2)
1096 %error use of ``%1'' %2 instruction in cpuname function: current_function
1097 %elif cpuflags_%2 < cpuflags_sse && notcpuflag(sse2) && __sizeofreg > 8
1098 %error use of ``%1'' sse2 instruction in cpuname function: current_function
1099 %endif
1100 %endif
1101 %endif
1102
1103 %if __emulate_avx
1104 %xdefine __src1 %7
1105 %xdefine __src2 %8
1106 %ifnidn %6, %7
1107 %if %0 >= 9
1108 CHECK_AVX_INSTR_EMU {%1 %6, %7, %8, %9}, %6, %8, %9
1109 %else
1110 CHECK_AVX_INSTR_EMU {%1 %6, %7, %8}, %6, %8
1111 %endif
1112 %if %5 && %4 == 0
1113 %ifnid %8
1114 ; 3-operand AVX instructions with a memory arg can only have it in src2,
1115 ; whereas SSE emulation prefers to have it in src1 (i.e. the mov).
1116 ; So, if the instruction is commutative with a memory arg, swap them.
1117 %xdefine __src1 %8
1118 %xdefine __src2 %7
1119 %endif
1120 %endif
1121 %if __sizeofreg == 8
1122 MOVQ %6, __src1
1123 %elif %3
1124 MOVAPS %6, __src1
1125 %else
1126 MOVDQA %6, __src1
1127 %endif
1128 %endif
1129 %if %0 >= 9
1130 %1 %6, __src2, %9
1131 %else
1132 %1 %6, __src2
1133 %endif
1134 %elif %0 >= 9
1135 __instr %6, %7, %8, %9
1136 %elif %0 == 8
1137 __instr %6, %7, %8
1138 %elif %0 == 7
1139 __instr %6, %7
1140 %else
1141 __instr %6
1142 %endif
1143 %endmacro
1144
1145 ;%1 == instruction
1146 ;%2 == minimal instruction set
1147 ;%3 == 1 if float, 0 if int
1148 ;%4 == 1 if non-destructive or 4-operand (xmm, xmm, xmm, imm), 0 otherwise
1149 ;%5 == 1 if commutative (i.e. doesn't matter which src arg is which), 0 if not
1150 %macro AVX_INSTR 1-5 fnord, 0, 1, 0
1151 %macro %1 1-10 fnord, fnord, fnord, fnord, %1, %2, %3, %4, %5
1152 %ifidn %2, fnord
1153 RUN_AVX_INSTR %6, %7, %8, %9, %10, %1
1154 %elifidn %3, fnord
1155 RUN_AVX_INSTR %6, %7, %8, %9, %10, %1, %2
1156 %elifidn %4, fnord
1157 RUN_AVX_INSTR %6, %7, %8, %9, %10, %1, %2, %3
1158 %elifidn %5, fnord
1159 RUN_AVX_INSTR %6, %7, %8, %9, %10, %1, %2, %3, %4
1160 %else
1161 RUN_AVX_INSTR %6, %7, %8, %9, %10, %1, %2, %3, %4, %5
1162 %endif
1163 %endmacro
1164 %endmacro
1165
1166 ; Instructions with both VEX and non-VEX encodings
1167 ; Non-destructive instructions are written without parameters
1168 AVX_INSTR addpd, sse2, 1, 0, 1
1169 AVX_INSTR addps, sse, 1, 0, 1
1170 AVX_INSTR addsd, sse2, 1, 0, 1
1171 AVX_INSTR addss, sse, 1, 0, 1
1172 AVX_INSTR addsubpd, sse3, 1, 0, 0
1173 AVX_INSTR addsubps, sse3, 1, 0, 0
1174 AVX_INSTR aesdec, fnord, 0, 0, 0
1175 AVX_INSTR aesdeclast, fnord, 0, 0, 0
1176 AVX_INSTR aesenc, fnord, 0, 0, 0
1177 AVX_INSTR aesenclast, fnord, 0, 0, 0
1178 AVX_INSTR aesimc
1179 AVX_INSTR aeskeygenassist
1180 AVX_INSTR andnpd, sse2, 1, 0, 0
1181 AVX_INSTR andnps, sse, 1, 0, 0
1182 AVX_INSTR andpd, sse2, 1, 0, 1
1183 AVX_INSTR andps, sse, 1, 0, 1
1184 AVX_INSTR blendpd, sse4, 1, 0, 0
1185 AVX_INSTR blendps, sse4, 1, 0, 0
1186 AVX_INSTR blendvpd, sse4, 1, 0, 0
1187 AVX_INSTR blendvps, sse4, 1, 0, 0
1188 AVX_INSTR cmppd, sse2, 1, 1, 0
1189 AVX_INSTR cmpps, sse, 1, 1, 0
1190 AVX_INSTR cmpsd, sse2, 1, 1, 0
1191 AVX_INSTR cmpss, sse, 1, 1, 0
1192 AVX_INSTR comisd, sse2
1193 AVX_INSTR comiss, sse
1194 AVX_INSTR cvtdq2pd, sse2
1195 AVX_INSTR cvtdq2ps, sse2
1196 AVX_INSTR cvtpd2dq, sse2
1197 AVX_INSTR cvtpd2ps, sse2
1198 AVX_INSTR cvtps2dq, sse2
1199 AVX_INSTR cvtps2pd, sse2
1200 AVX_INSTR cvtsd2si, sse2
1201 AVX_INSTR cvtsd2ss, sse2
1202 AVX_INSTR cvtsi2sd, sse2
1203 AVX_INSTR cvtsi2ss, sse
1204 AVX_INSTR cvtss2sd, sse2
1205 AVX_INSTR cvtss2si, sse
1206 AVX_INSTR cvttpd2dq, sse2
1207 AVX_INSTR cvttps2dq, sse2
1208 AVX_INSTR cvttsd2si, sse2
1209 AVX_INSTR cvttss2si, sse
1210 AVX_INSTR divpd, sse2, 1, 0, 0
1211 AVX_INSTR divps, sse, 1, 0, 0
1212 AVX_INSTR divsd, sse2, 1, 0, 0
1213 AVX_INSTR divss, sse, 1, 0, 0
1214 AVX_INSTR dppd, sse4, 1, 1, 0
1215 AVX_INSTR dpps, sse4, 1, 1, 0
1216 AVX_INSTR extractps, sse4
1217 AVX_INSTR haddpd, sse3, 1, 0, 0
1218 AVX_INSTR haddps, sse3, 1, 0, 0
1219 AVX_INSTR hsubpd, sse3, 1, 0, 0
1220 AVX_INSTR hsubps, sse3, 1, 0, 0
1221 AVX_INSTR insertps, sse4, 1, 1, 0
1222 AVX_INSTR lddqu, sse3
1223 AVX_INSTR ldmxcsr, sse
1224 AVX_INSTR maskmovdqu, sse2
1225 AVX_INSTR maxpd, sse2, 1, 0, 1
1226 AVX_INSTR maxps, sse, 1, 0, 1
1227 AVX_INSTR maxsd, sse2, 1, 0, 1
1228 AVX_INSTR maxss, sse, 1, 0, 1
1229 AVX_INSTR minpd, sse2, 1, 0, 1
1230 AVX_INSTR minps, sse, 1, 0, 1
1231 AVX_INSTR minsd, sse2, 1, 0, 1
1232 AVX_INSTR minss, sse, 1, 0, 1
1233 AVX_INSTR movapd, sse2
1234 AVX_INSTR movaps, sse
1235 AVX_INSTR movd, mmx
1236 AVX_INSTR movddup, sse3
1237 AVX_INSTR movdqa, sse2
1238 AVX_INSTR movdqu, sse2
1239 AVX_INSTR movhlps, sse, 1, 0, 0
1240 AVX_INSTR movhpd, sse2, 1, 0, 0
1241 AVX_INSTR movhps, sse, 1, 0, 0
1242 AVX_INSTR movlhps, sse, 1, 0, 0
1243 AVX_INSTR movlpd, sse2, 1, 0, 0
1244 AVX_INSTR movlps, sse, 1, 0, 0
1245 AVX_INSTR movmskpd, sse2
1246 AVX_INSTR movmskps, sse
1247 AVX_INSTR movntdq, sse2
1248 AVX_INSTR movntdqa, sse4
1249 AVX_INSTR movntpd, sse2
1250 AVX_INSTR movntps, sse
1251 AVX_INSTR movq, mmx
1252 AVX_INSTR movsd, sse2, 1, 0, 0
1253 AVX_INSTR movshdup, sse3
1254 AVX_INSTR movsldup, sse3
1255 AVX_INSTR movss, sse, 1, 0, 0
1256 AVX_INSTR movupd, sse2
1257 AVX_INSTR movups, sse
1258 AVX_INSTR mpsadbw, sse4
1259 AVX_INSTR mulpd, sse2, 1, 0, 1
1260 AVX_INSTR mulps, sse, 1, 0, 1
1261 AVX_INSTR mulsd, sse2, 1, 0, 1
1262 AVX_INSTR mulss, sse, 1, 0, 1
1263 AVX_INSTR orpd, sse2, 1, 0, 1
1264 AVX_INSTR orps, sse, 1, 0, 1
1265 AVX_INSTR pabsb, ssse3
1266 AVX_INSTR pabsd, ssse3
1267 AVX_INSTR pabsw, ssse3
1268 AVX_INSTR packsswb, mmx, 0, 0, 0
1269 AVX_INSTR packssdw, mmx, 0, 0, 0
1270 AVX_INSTR packuswb, mmx, 0, 0, 0
1271 AVX_INSTR packusdw, sse4, 0, 0, 0
1272 AVX_INSTR paddb, mmx, 0, 0, 1
1273 AVX_INSTR paddw, mmx, 0, 0, 1
1274 AVX_INSTR paddd, mmx, 0, 0, 1
1275 AVX_INSTR paddq, sse2, 0, 0, 1
1276 AVX_INSTR paddsb, mmx, 0, 0, 1
1277 AVX_INSTR paddsw, mmx, 0, 0, 1
1278 AVX_INSTR paddusb, mmx, 0, 0, 1
1279 AVX_INSTR paddusw, mmx, 0, 0, 1
1280 AVX_INSTR palignr, ssse3
1281 AVX_INSTR pand, mmx, 0, 0, 1
1282 AVX_INSTR pandn, mmx, 0, 0, 0
1283 AVX_INSTR pavgb, mmx2, 0, 0, 1
1284 AVX_INSTR pavgw, mmx2, 0, 0, 1
1285 AVX_INSTR pblendvb, sse4, 0, 0, 0
1286 AVX_INSTR pblendw, sse4
1287 AVX_INSTR pclmulqdq
1288 AVX_INSTR pcmpestri, sse42
1289 AVX_INSTR pcmpestrm, sse42
1290 AVX_INSTR pcmpistri, sse42
1291 AVX_INSTR pcmpistrm, sse42
1292 AVX_INSTR pcmpeqb, mmx, 0, 0, 1
1293 AVX_INSTR pcmpeqw, mmx, 0, 0, 1
1294 AVX_INSTR pcmpeqd, mmx, 0, 0, 1
1295 AVX_INSTR pcmpeqq, sse4, 0, 0, 1
1296 AVX_INSTR pcmpgtb, mmx, 0, 0, 0
1297 AVX_INSTR pcmpgtw, mmx, 0, 0, 0
1298 AVX_INSTR pcmpgtd, mmx, 0, 0, 0
1299 AVX_INSTR pcmpgtq, sse42, 0, 0, 0
1300 AVX_INSTR pextrb, sse4
1301 AVX_INSTR pextrd, sse4
1302 AVX_INSTR pextrq, sse4
1303 AVX_INSTR pextrw, mmx2
1304 AVX_INSTR phaddw, ssse3, 0, 0, 0
1305 AVX_INSTR phaddd, ssse3, 0, 0, 0
1306 AVX_INSTR phaddsw, ssse3, 0, 0, 0
1307 AVX_INSTR phminposuw, sse4
1308 AVX_INSTR phsubw, ssse3, 0, 0, 0
1309 AVX_INSTR phsubd, ssse3, 0, 0, 0
1310 AVX_INSTR phsubsw, ssse3, 0, 0, 0
1311 AVX_INSTR pinsrb, sse4
1312 AVX_INSTR pinsrd, sse4
1313 AVX_INSTR pinsrq, sse4
1314 AVX_INSTR pinsrw, mmx2
1315 AVX_INSTR pmaddwd, mmx, 0, 0, 1
1316 AVX_INSTR pmaddubsw, ssse3, 0, 0, 0
1317 AVX_INSTR pmaxsb, sse4, 0, 0, 1
1318 AVX_INSTR pmaxsw, mmx2, 0, 0, 1
1319 AVX_INSTR pmaxsd, sse4, 0, 0, 1
1320 AVX_INSTR pmaxub, mmx2, 0, 0, 1
1321 AVX_INSTR pmaxuw, sse4, 0, 0, 1
1322 AVX_INSTR pmaxud, sse4, 0, 0, 1
1323 AVX_INSTR pminsb, sse4, 0, 0, 1
1324 AVX_INSTR pminsw, mmx2, 0, 0, 1
1325 AVX_INSTR pminsd, sse4, 0, 0, 1
1326 AVX_INSTR pminub, mmx2, 0, 0, 1
1327 AVX_INSTR pminuw, sse4, 0, 0, 1
1328 AVX_INSTR pminud, sse4, 0, 0, 1
1329 AVX_INSTR pmovmskb, mmx2
1330 AVX_INSTR pmovsxbw, sse4
1331 AVX_INSTR pmovsxbd, sse4
1332 AVX_INSTR pmovsxbq, sse4
1333 AVX_INSTR pmovsxwd, sse4
1334 AVX_INSTR pmovsxwq, sse4
1335 AVX_INSTR pmovsxdq, sse4
1336 AVX_INSTR pmovzxbw, sse4
1337 AVX_INSTR pmovzxbd, sse4
1338 AVX_INSTR pmovzxbq, sse4
1339 AVX_INSTR pmovzxwd, sse4
1340 AVX_INSTR pmovzxwq, sse4
1341 AVX_INSTR pmovzxdq, sse4
1342 AVX_INSTR pmuldq, sse4, 0, 0, 1
1343 AVX_INSTR pmulhrsw, ssse3, 0, 0, 1
1344 AVX_INSTR pmulhuw, mmx2, 0, 0, 1
1345 AVX_INSTR pmulhw, mmx, 0, 0, 1
1346 AVX_INSTR pmullw, mmx, 0, 0, 1
1347 AVX_INSTR pmulld, sse4, 0, 0, 1
1348 AVX_INSTR pmuludq, sse2, 0, 0, 1
1349 AVX_INSTR por, mmx, 0, 0, 1
1350 AVX_INSTR psadbw, mmx2, 0, 0, 1
1351 AVX_INSTR pshufb, ssse3, 0, 0, 0
1352 AVX_INSTR pshufd, sse2
1353 AVX_INSTR pshufhw, sse2
1354 AVX_INSTR pshuflw, sse2
1355 AVX_INSTR psignb, ssse3, 0, 0, 0
1356 AVX_INSTR psignw, ssse3, 0, 0, 0
1357 AVX_INSTR psignd, ssse3, 0, 0, 0
1358 AVX_INSTR psllw, mmx, 0, 0, 0
1359 AVX_INSTR pslld, mmx, 0, 0, 0
1360 AVX_INSTR psllq, mmx, 0, 0, 0
1361 AVX_INSTR pslldq, sse2, 0, 0, 0
1362 AVX_INSTR psraw, mmx, 0, 0, 0
1363 AVX_INSTR psrad, mmx, 0, 0, 0
1364 AVX_INSTR psrlw, mmx, 0, 0, 0
1365 AVX_INSTR psrld, mmx, 0, 0, 0
1366 AVX_INSTR psrlq, mmx, 0, 0, 0
1367 AVX_INSTR psrldq, sse2, 0, 0, 0
1368 AVX_INSTR psubb, mmx, 0, 0, 0
1369 AVX_INSTR psubw, mmx, 0, 0, 0
1370 AVX_INSTR psubd, mmx, 0, 0, 0
1371 AVX_INSTR psubq, sse2, 0, 0, 0
1372 AVX_INSTR psubsb, mmx, 0, 0, 0
1373 AVX_INSTR psubsw, mmx, 0, 0, 0
1374 AVX_INSTR psubusb, mmx, 0, 0, 0
1375 AVX_INSTR psubusw, mmx, 0, 0, 0
1376 AVX_INSTR ptest, sse4
1377 AVX_INSTR punpckhbw, mmx, 0, 0, 0
1378 AVX_INSTR punpckhwd, mmx, 0, 0, 0
1379 AVX_INSTR punpckhdq, mmx, 0, 0, 0
1380 AVX_INSTR punpckhqdq, sse2, 0, 0, 0
1381 AVX_INSTR punpcklbw, mmx, 0, 0, 0
1382 AVX_INSTR punpcklwd, mmx, 0, 0, 0
1383 AVX_INSTR punpckldq, mmx, 0, 0, 0
1384 AVX_INSTR punpcklqdq, sse2, 0, 0, 0
1385 AVX_INSTR pxor, mmx, 0, 0, 1
1386 AVX_INSTR rcpps, sse, 1, 0, 0
1387 AVX_INSTR rcpss, sse, 1, 0, 0
1388 AVX_INSTR roundpd, sse4
1389 AVX_INSTR roundps, sse4
1390 AVX_INSTR roundsd, sse4
1391 AVX_INSTR roundss, sse4
1392 AVX_INSTR rsqrtps, sse, 1, 0, 0
1393 AVX_INSTR rsqrtss, sse, 1, 0, 0
1394 AVX_INSTR shufpd, sse2, 1, 1, 0
1395 AVX_INSTR shufps, sse, 1, 1, 0
1396 AVX_INSTR sqrtpd, sse2, 1, 0, 0
1397 AVX_INSTR sqrtps, sse, 1, 0, 0
1398 AVX_INSTR sqrtsd, sse2, 1, 0, 0
1399 AVX_INSTR sqrtss, sse, 1, 0, 0
1400 AVX_INSTR stmxcsr, sse
1401 AVX_INSTR subpd, sse2, 1, 0, 0
1402 AVX_INSTR subps, sse, 1, 0, 0
1403 AVX_INSTR subsd, sse2, 1, 0, 0
1404 AVX_INSTR subss, sse, 1, 0, 0
1405 AVX_INSTR ucomisd, sse2
1406 AVX_INSTR ucomiss, sse
1407 AVX_INSTR unpckhpd, sse2, 1, 0, 0
1408 AVX_INSTR unpckhps, sse, 1, 0, 0
1409 AVX_INSTR unpcklpd, sse2, 1, 0, 0
1410 AVX_INSTR unpcklps, sse, 1, 0, 0
1411 AVX_INSTR xorpd, sse2, 1, 0, 1
1412 AVX_INSTR xorps, sse, 1, 0, 1
1413
1414 ; 3DNow instructions, for sharing code between AVX, SSE and 3DN
1415 AVX_INSTR pfadd, 3dnow, 1, 0, 1
1416 AVX_INSTR pfsub, 3dnow, 1, 0, 0
1417 AVX_INSTR pfmul, 3dnow, 1, 0, 1
1418
1419 ; base-4 constants for shuffles
1420 %assign i 0
1421 %rep 256
1422 %assign j ((i>>6)&3)*1000 + ((i>>4)&3)*100 + ((i>>2)&3)*10 + (i&3)
1423 %if j < 10
1424 CAT_XDEFINE q000, j, i
1425 %elif j < 100
1426 CAT_XDEFINE q00, j, i
1427 %elif j < 1000
1428 CAT_XDEFINE q0, j, i
1429 %else
1430 CAT_XDEFINE q, j, i
1431 %endif
1432 %assign i i+1
1433 %endrep
1434 %undef i
1435 %undef j
1436
1437 %macro FMA_INSTR 3
1438 %macro %1 4-7 %1, %2, %3
1439 %if cpuflag(xop)
1440 v%5 %1, %2, %3, %4
1441 %elifnidn %1, %4
1442 %6 %1, %2, %3
1443 %7 %1, %4
1444 %else
1445 %error non-xop emulation of ``%5 %1, %2, %3, %4'' is not supported
1446 %endif
1447 %endmacro
1448 %endmacro
1449
1450 FMA_INSTR pmacsww, pmullw, paddw
1451 FMA_INSTR pmacsdd, pmulld, paddd ; sse4 emulation
1452 FMA_INSTR pmacsdql, pmuldq, paddq ; sse4 emulation
1453 FMA_INSTR pmadcswd, pmaddwd, paddd
1454
1455 ; tzcnt is equivalent to "rep bsf" and is backwards-compatible with bsf.
1456 ; This lets us use tzcnt without bumping the yasm version requirement yet.
1457 %define tzcnt rep bsf
1458
1459 ; Macros for consolidating FMA3 and FMA4 using 4-operand (dst, src1, src2, src3) syntax.
1460 ; FMA3 is only possible if dst is the same as one of the src registers.
1461 ; Either src2 or src3 can be a memory operand.
1462 %macro FMA4_INSTR 2-*
1463 %push fma4_instr
1464 %xdefine %$prefix %1
1465 %rep %0 - 1
1466 %macro %$prefix%2 4-6 %$prefix, %2
1467 %if notcpuflag(fma3) && notcpuflag(fma4)
1468 %error use of ``%5%6'' fma instruction in cpuname function: current_function
1469 %elif cpuflag(fma4)
1470 v%5%6 %1, %2, %3, %4
1471 %elifidn %1, %2
1472 ; If %3 or %4 is a memory operand it needs to be encoded as the last operand.
1473 %ifid %3
1474 v%{5}213%6 %2, %3, %4
1475 %else
1476 v%{5}132%6 %2, %4, %3
1477 %endif
1478 %elifidn %1, %3
1479 v%{5}213%6 %3, %2, %4
1480 %elifidn %1, %4
1481 v%{5}231%6 %4, %2, %3
1482 %else
1483 %error fma3 emulation of ``%5%6 %1, %2, %3, %4'' is not supported
1484 %endif
1485 %endmacro
1486 %rotate 1
1487 %endrep
1488 %pop
1489 %endmacro
1490
1491 FMA4_INSTR fmadd, pd, ps, sd, ss
1492 FMA4_INSTR fmaddsub, pd, ps
1493 FMA4_INSTR fmsub, pd, ps, sd, ss
1494 FMA4_INSTR fmsubadd, pd, ps
1495 FMA4_INSTR fnmadd, pd, ps, sd, ss
1496 FMA4_INSTR fnmsub, pd, ps, sd, ss
1497
1498 ; workaround: vpbroadcastq is broken in x86_32 due to a yasm bug (fixed in 1.3.0)
1499 %ifdef __YASM_VER__
1500 %if __YASM_VERSION_ID__ < 0x01030000 && ARCH_X86_64 == 0
1501 %macro vpbroadcastq 2
1502 %if sizeof%1 == 16
1503 movddup %1, %2
1504 %else
1505 vbroadcastsd %1, %2
1506 %endif
1507 %endmacro
1508 %endif
1509 %endif